Understanding ARM Assembly, Part 1

Thumb and Arm64 dropped support for conditional execution.

For ARM thumb2 style you need a third instruction between the two:

  IT EQ

The 'IT' is for 'if then'. There could also be more 'then's and 'else's for the conditional execution of muliple instructions:

  ITTE LT

(If then then else) The following instructions could for example be:

  ADDEQ ...
  STREQ ...
  BNE ... (Branch - not equal because of the else)

Source: http://community.arm.com/groups/processors/blog/2010/09/30/c...

Sort of. Thumb requires that you use an 'it' instruction before a block of up to 4 conditional instructions. Think "if-then". You can make each instruction a 'then' or an 'else' by instruction variants. E.g. something like

  ittee eq
  addeq ...
  addeq ...
  addne ...
  addne ...

I believe ARM v8 dropped all this.

You might be interested in Itanium and the IA-64 architecture, which has what is referred to as branch predication:

http://www.cs.umd.edu/class/fall2001/cmsc411/projects/IA64-2...

http://www.drdobbs.com/embedded-systems/predication-speculat...

Predication allows all of the code to be executed, and a subset of the results of the code — those from the failing test — discarded.

Part 3: http://blogs.msdn.com/b/ntdebugging/archive/2014/05/29/under...

I used to write games on RiscOS in ARM assembly. Sooo much nicer than any other the others I'd used before or since. One thing I vaguely remember (my memory is pretty poor) was being able to load 64 bytes worth of data into the registers with one instruction (and store them with another). This meant writing sprite blit routes was a joy and super fast. The conditional instructions also were lovely.

A few years later when I was writing R3000 assembly on the PS1 I remember thinking how poor it felt compared to writing ARM assembly (the R3000 was the only other RISC assembly language I'd used other than ARM at that point).

It was the only assembly language I genuinely enjoyed writing code in rather than what usually felt like a fight with most other assemblers. I give Sophie Wilson the credit for that, and probably the credit for my entire career, because of BBC BASIC on the BBC Micro before that!

SIMD does stand for Single Instruction Multiple Data [0]. So, the hardware performs some linear algebra operation on one or more vectors. Whether the vector is stored in unique registers, combined registers (as described above), or memory buffer(s), that is up to the hardware designer. In fact, on x86, the MMX registers were aliases to the normal floating point registers [1], and whereas on SSE, new registers were added [2].

[0] https://en.wikipedia.org/wiki/SIMD

[1] https://en.wikipedia.org/wiki/MMX_(instruction_set)#Technica...

[2] https://en.wikipedia.org/wiki/Streaming_SIMD_Extensions#Regi...

One instruction is not being executed against multiple registers, it's that the same 128bit register range can used as q, d, or s registers depending on the which instructions you're executing

> Have a set of circuitry that pushes one command to multiple registers?

A command is not "pushed" to a register; CPU registers are mostly passive, often on a very small and very fast block of memory called the "register file". Instead, values are read from the register file, processed, and written back to the register file (simplifying a bit).

How it's implemented is up to the hardware designer. For instance, adding a pair of 64-bit values from q0 to a pair of 64-bit values in q1 could be implemented as reading first d0 and d2 and adding them, followed by reading d1 and d3 and adding them (with pipelining, the second add can start while the first add is still executing). Or it could be implemented as reading d0 and d1 in parallel, reading d2 and d3 in parallel, and adding both pairs in parallel (using a pair of adders). Or it could be something even more complex.