One really neat thing about make: If you include other makefiles then before including them make checks if there are prerequisites of these files and rebuilds them as needed. One can use this to automatically generate header dependencies of translation units for C/C++ projects. Some of the relevant lines in one of my Makefiles:
include ${DEPENDS}
${DEPDIR}/%.d: ${SRCDIR}/%.${SRCEXT}
@mkdir -p ${shell dirname $@} ; \
$(CC) -MM ${INCLUDE} -mmcu='${AVRTARGET}' $< >> $@
If any file in the "include" line needs updating then it is generated by gcc and included in the same make run. I didn't find a good documentation about this feature and I discovered this with make's pretty verbose -d option. Previously I did something like this using multiple makefiles and recursively calling make which is generally frowned upon (for valid reasons).