Referring to the list on wikipedia again, compare two different 4-core CPUs:
Intel Core i5-2500K 4-core: 83,000 MIPS at 3.3 GHz
Intel Core i7 875K: 92,100 MIPS at 2.93 GHz
Modern CPUs use pipelining which executes many instructions parallel. This only works well if everything goes as predicted. If you have an algorithm which works contrary to what the branch prediction thinks and a cache which does not hold the data you need, your performance goes down the drain. Those MIPS mean nothing if not put into the right context.
Cache misses make CPU speed irrelevant, but when you look at your memory system it's another instance of the same problem with the same tradeoffs of frequency vs. work per cycle. And when the "right context" is waiting for the outside world, that's not the most important context.
http://www.hpl.hp.com/techreports/Compaq-DEC/WRL-93-6.pdf
It explores the limits of instruction-level parallelism. If you had a processor that could dispatch an unlimited number of independent instructions simultaneously, how much of an improvement in common algorithms would you get?