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Nah, Tomasulo and all that jazz (microarchitecture) is about improving performance once you've got a defined instruction set.

Microcode (which is one of those highly confidential things that both Intel and AMD hold close and dear) is about doing an on-the-fly CISC to RISC transformation because you realized that the legacy x86 ISA is an absolute pain to handle (but you aren't willing to give it up).

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I believe you are confusing microcode (which is mainly used for complex and slow instructions and does not need to be RISC) with micro-ops which is the Intel lingo for the internal RISC operations.

Register renaming is a key part of high performance ISA emulation. The x64 has 16 gp registers but the internal RISC normally has 80. Of course this is also a key part of OOO and alike as you mentioned.

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