Less well known, but Torbjorn Granlund Instruction latencies and throughput for AMD and Intel x86 processors has also been updated for Ryzen.
What I like about it is that it makes it easy to compare how microarchitectures handle a given instruction over time. For example, the BT instructions were a little slow, 2 cycles, 1 port through Haswell. With Broadwell that changed to 1 cycle and 2 ports. Similarly, CMOV improved with Broadwell (remember Linus' rant about the evils of CMOV?) and is now 1 cycle latency.
I don't know InstLat. Do you have a link?