Hacker News Reader

Comment by mmanfrin | Hacker News Reader

3nm is hugely smaller than anything else I've heard of. I know Intel is stuck at 14nm, and Samsung is at 10nm for their ARM chips (? someone correct me on that) -- could someone educate me on what 3nm chip technology means? Would it be 3x the speed density/possibility compared to 10nm chips?

View on HN

Nodes are hard to compare, and pretty much everybody agrees that what Intel called 14nm is roughly equivalent to other foundries' 10nm. (Maybe some of the 10nm processes are 10 or 15% more dense than Intel's 14, but nothing like the 2x we should have with more straightforward comparisons)

And that's not even the end of the story. Intel 14nm++ is expected to be slightly LESS dense than their previous 14nm and 14nm+, to alleviate some of the problems that start to appear with such small nodes.

Let's not even talk about EUV processes, that will be needed to go under 7nm (IIRC). We are not even sure they can be used for mass production. Probably they can, but there are still a lot of things to fix in this area. 10 years ago it was expected to be in mass prod today or even 1 or 2 year ago - and it is still very far from ready. Fur sure they will be crazy expensive too, so tons of chip will continue to be produced on processes with bigger nodes.

So talking about 3nm now is bound to not be extremely precise, given all the unknown. Its dubious it will come as soon as 2022. It will be crazy expensive, but we already knew that.

(this is my ignorant understanding of how CPU sizing works)

Process size isn't the end-all be-all stat to follow for CPU manufacturing sizes. While Intel may not be leading here, they are leading when it comes to feature sizes.

https://www.extremetech.com/computing/246902-intel-claims-th...

The idea being of how large the features of the CPU are to make up the building block for parts of the system. While Intel's process may be larger, they end up getting smaller overall chips because they can still get more "Features" into a smaller area.

Also, Most CPUs aren't made at a single process size. They will mix 2-3 generations of process sizes when producing CPUs, and only put the hot-path parts of the CPU in the newest process size (to help improve yields).

> Also, Most CPUs aren't made at a single process size. They will mix 2-3 generations of process sizes when producing CPUs, and only put the hot-path parts of the CPU in the newest process size (to help improve yields).

No, you can't mix different processes on one wafer.

I think you mean that not everything on a CPU is at the minimum viable size of that process.

Thanks. Would you say this article describes the whole situation well?

http://wccftech.com/intel-losing-process-lead-analysis-7nm-2...

This is an announcement for construction of a "5 or 3nm fab as early as 2022." So, five years out, minimum, and the node size is a moving target.

The title is a bit clickbaity.

I found some side concerns interesting:

- an earlier node was delayed due to environmental permitting

- this project will require a lot of land

- the Taiwanese government is committed to keeping this fab at home, and willing to work with TSMC on the environmental issues.

Yeah, I think it'll be important from the perspective of the... tenuous relationship between PRC and ROC. In that sense, there is almost no environmental stress that wouldn't be worth overcoming.

Would it even work I think is the more meaningful question. Last I heard we we having trouble with electrons tunneling across the gates as we got smaller.

That's just one of many problems…

You have to start wondering if they will use quantum behaviour like Anderson localisation that sets up a standing wave effectively stopping electrons from tunnelling in certain places (design it to bias against and/or stop gate leak tunnelling). Svitlana Mayboroda discovered a lanscape function that allows you to predict (and hence design) this kind of behaviour. As to how actively using these kinds of quantum behaviour affects feature size / speeds / feeds / yields will probably eat several tens of millions / years as well.

I think 7nm exists somewhere, but I could be wrong.

7nm chips (TSMC manufacturing for Qualcomm) are in the pipe for 2018 chip launch (so maybe 2019 in phones).

http://www.androidauthority.com/qualcomm-drops-samsung-to-wo...

It exists as a buzzword. Nothing about the TSMC 7nm node means actual 7nm gate widths. It will still only be about as good as what Intel is calling 14nm++.

The simple reality is that all these fab companies have some recent fab tech, that will be roughly the same across all of them, with the exception of Intel usually being slightly ahead of the rest. The names they give them are pointless now, though.

Since the nm doesn't really matter to consumers outside purchasing individual hardware components themselves, just getting the newest parts is all you can really care about. You look at the performance, power draw, and cost and make a judgement from there, and things like "Intel 14nm vs TSMC 7nm vs GF Finfat 10nm or Samsungs whatever" are meaningless marketing drivel.

As for end product realization compared to current gen stuff, it'll be about the scale of difference between the XBox360 to the XBox One.

Don't get stuck up on the numbers, they are all marketing numbers.

Reply on news.ycombinator.com