Intel vs GlobalFoundries at the leading edge | Hacker News Reader

Intel vs GlobalFoundries at the leading edge

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114 pointsyaantc58 comments

>It is also surprising to me to see how far Intel has fallen from the process lead they had. First with HKMG by several years, first with FinFet by several year, I suppose they are still first to do cobalt interconnect but in terms of process density the foundries have caught them and appear poised to take a substantial lead over the next several years.

>With Intel offering foundry processes and GF, Samung and TSMC all offering leading edge processes the industry now has four viable leading edge process options.

Exciting times.

Indeed. Intel finally having some really competitive competitors (as it were) is great to see.

I was going to mutter about this great competition coming from overseas and being an example of the Decline Of The West, but Global Foundries appears to be a mainly US+Europe based thing. (I know it span out of AMD a while back but had assumed until just now that it did all its manufacturing in China).

Exciting times indeed.

I think fabs are a business where capital rules vs labor cost. GlobalFoundies built a fab in New York, but got megabucks in aid to do so.

GlobalFoundries is getting massive incentives to expand in New York State. The initial Saratoga Springs is just the first fab Cuomo has built for them. Currently, they're building another fab in Utica that's intended to rehabilitate it after its Rust Belt woes.

Similarly, Tesla/Solar City received a huge number of economic incentives to build a factory in Buffalo.

Naturally, since this is NYS there's also been a fair bit of corruption:

[1] http://www.timesunion.com/local/article/Kaloyeros-in-fight-t...

I fully expect the state government to throw a bunch of incentives at Amazon as well for HQ2- there's a push in Rochester for someone to take over all of the Kodak/Xerox buildings after those two companies royally messed up.

GloFo is owned by a middle eastern oil fund btw.

No international company will put a fab in china unless the equipment is 10 years out of date. Semi conducter production isn’t labor intensive anyways.

False. GF has a JV to build a 300mm 22nm FD-SOI line in China https://www.globalfoundries.com/news-events/press-releases/g...

22 nm is about 10 years old.

Not the same thing. 22 FD-SOI is current gen for FD-SOI.

TSMC is also building a 16nm line https://www.eetimes.com/document.asp?doc_id=1332704

While it is true that cutting edge lines are going to stay in established facilities with established R&D teams there is nothing stopping China from getting the tech. Everything is for sale. What China is missing is the expert workforce that can actually bring up a line for a next gen process themselves, which takes time to build, not just money.

There are two things china can’t buy because no country will sell it to them: a. Advanced semi conductor tech, b. Modern Jet turbine tech. Those two things China has to (and is) develop themselves. They definitely aren’t there yet, which is why they import those things in spades (most semiconductors are imported, and even china’s own jet fighters are mostly reliant on saturns). They will probably get there in the future.

If they poach the employees from the companies building this stuff, wouldn't it be possible for them to build it? Also, I am not much knowledgeable about jet engines but why can't they just reverse engineer jet turbine tech.

No one person knows how to do it all, it really is a closely guarded secret. For jet turbines, the metallurgy is key. For semi conductors, there are materials but really it is just many many details distributed throughout the entire organization. Crazy when you think about it.

But there are other things: just look what the C919 is importing: besides turbines, the avionics are imported as well. Complex software...

Don’t GF have a 12nm FD SOI process?

Projecting first customer tape outs in 1H 2019 (https://www.globalfoundries.com/news-events/press-releases/g...) as of a year ago - so still in early development.

Intel is delayed on their next-gen node and so that has given the others time to get Intel's last-gen node working but that in no way indicates that they will surpass Intel.

Yeah. It's hard to tell how much we are seeing these reviews because people want to see Intel get passed vs. because Intel is actually getting passed.

Are there any rest that chips released, actual chips, where the different foundries can say "look here's 1kb of sram on an actual chip, with this basic adder circuit, and this is how much area it takes and this is how much energy it consumes on our latest process"?

Actual performance doesn't always match the spec sheet, it's hard to get a true comparison unless you've got circuits from each foundry.

I studied all this stuff in university during the dark ages, and still have to do a double take whenever I see “nm” measurements. These things are atomic scale, and we use them all day long as if nothing happened.

Yeah I can remember how amazing 1 micron widths were. getting to 100th of that is a miracle.

Slightly off topic but, how do they create the lithography masks with such tiny and precise features?

Cut with lasers or electron beams as far as I know, and the masks are bigger by some multiple. Also have really weird patterns, since they have to correct for how the light-waves interact due to the small size.

I see it as more confirmation that Moore's Law is probably dead for real this time. By many measures Intel has enjoyed a 2 - 5 year lead over the competition in terms of circuit design and they have lost that lead. What that says to me is that over the last 2 - 5 years everything they have tried in order to push past this node has not resulted in useful advances. And if they can't push this down the beach can anyone else?

Intel has known their Dennard Scaling was petering out for a while now.

I think Intel is more concerned with the loss of their instruction set architecture "monpoly." Despite their massive R&D investments, they aren't expecting process scaling to be the big win for much longer.

I think it depends what you mean by moor's law, since everyone seems have a different view on it. If we are still talking about transistor density then it is not dead yet. Intel as shown the improvement from 14nm and 10nm is roughly in line. But i am pretty certain the next one wont fit the graph line any more. But if we are taking about the economics of transistor where it is getting cheaper 40-50% cheaper every two years then that has gone since 14nm.

I've heard it claimed that the delays in Intel's new process node were mostly due to problems debugging the cobalt metal layers. If that's true I wonder if other players will avoid it for a bit? But the problems it solves will only get more pressing as feature sizes shrink so that might not be feasible.

My impression of Intel's process compared to most foundries is that they tend to have higher drive currents at a given node leading to faster switching speeds but also more restrictive design rules leading to lower practical densities then the standard cell size would predict. And making it hard for them to act as a foundry, though it's still possible. But my understanding at this level is tenuous and don't place too much weight on it.

And overall the general slowdown in Moore's law means that Intel's technology lead has less of a performance/price ramification.

The problem is that none of the other players so far has been able to produce chips with the size and power envelope of modern CPUs or GPUs.

Intel will release some 10nm in mid 2018 but these would be the Core M ultra low power parts.

AMD isn't going for 7nm in 2018 just yet, the Ryzen refresh slated for March of 2018 is going to be on 12nm which is a rebrand of GF14 NM process rather than a true node shrink.

I'm not entirely sure if GF or any other foundry would actually come out with large power hungry dies on 7nm any time soon.

TSMC seems not to be able to produce them even on 10nm, which is why they introduced their 12nm process which is back of the line node improvement of their 16nm node primarily so NVIDIA could produce their GPUs on it.

So far the only parts which are made on 10nm are mobile SoCs.

TSMC never intended to use 10nm. They planned to skip it to get to 7nm faster. Samsung planned for 10nm on the other hand, because it thought 10nm will be a "long node" (it won't be).

Also Samsung's first 7nm node will use EUV lithography, which may be a bit too costly for most chip makers, and that may have played a role in developing the stop-gap 10nm process, too. We'll likely see most of the 7nm users switch to GloFo and TSMC until Samsung lowers costs/increases yield for its 7nm process.

Intended or not both of them adopted 10nm which is closer to Intel’s 14nm not counting the fact that they neither can produce large or power hungry chips on either process.

GF is skipping EUV for the initial 7nm process and based on the issues they and Intel have been having with masks and patterning under EUV I’m not sure if they’ll be on track for EUV in 2019.

In either case it would be very interesting to see what Intel is going to end up releasing it might be in lithography hell with 10nm or it might be overblown.

Intel’s 14nm++ and +++ processes atm do not have competition and it’s not clear just how much it would matter if GF moves to 7nm before Intel atm.

Intel’s biggest problem is less with their process and more with their roadmap as it seems that they want to launch 14nm+++, 10nm and 10nm+ products all within a similar time window with a huge overlap. If I was an OEM atm it would be rather confused.

"Intel will release" :D how many times I heard that before :D probably since 2014 or 2015 and there are still no 10nm CPUs from Intel...

>And making it hard for them to act as a foundry

That is why they have made a node specially for Custom Foundry.

https://fuse.wikichip.org/news/567/iedm-2017-intel-details-2...

I'd noticed that Intel's recent foundry wins were confusing me but with that relaxed process they make much more sense.

Yeah, Intel's design rules are infamously draconian.

> My impression of Intel's process compared to most foundries is that they tend to have higher drive currents at a given node leading to faster switching speeds but also more restrictive design rules leading to lower practical densities then the standard cell size would predict.

And better yields. Intel used to get outrageously better yields versus everybody else in the world.

> And overall the general slowdown in Moore's law means that Intel's technology lead has less of a performance/price ramification.

This. Memory fell off Moore's law many moons ago, and a modern processor is mostly a lot of memory.

There is a reason everybody is finally putting real effort into concurrency. And, it's not because it somehow magically got easier in the last 30 years ...

Yep, but GF seems to have caught up with the licensed process they're on now, AMD have been seeing excellent yields with their Ryzen chips, to the point that quite a few people are finding their Ryzen 3 actually has 8 cores - I'm guessing the yields are so good that disabling the extra cores would cost more.

"EUV in mass production" is something akin to commercial fusion power. Every few years, a big fab comes forward and says that they will get EUV in production in yet another few years.

Except this time, there is a genuine need for it. There is only that much free area they can get by squeezing cell sizes.

After compact SRAMs (there are a few 4T and 3d SRAM designs that fabs will be introducing next year to compensate for missed node shrink https://www.eetimes.com/document.asp?doc_id=1332734), they will not have many things left to shrink.

EUV was thought to be a way to avoid multipatterning at 65/45 transition, but now we will have to do quad patterning with both 10nm and with EUV at 7nm, and this makes the main reason for EUV use (avoiding multipatterning) not that all important.

EUV is a crazy technology, but comparing it to fusion makes no sense. ASML has already demonstrated near 250W brightness sources, their plan appears to be brute forcing away the brightness issue.

The comparison IMO makes perfect sense: there are promises but nothing actually works. Even you state something about plans.

Better to say, when one blocker issue is solved with EUV, 2 or more new ones are discovered. And further you go, more people question "whether it all worth it?"

I'm waiting for Intel to divest of either the arch/micro-arch business or the fab business. They can invest in one or the other, but what is crippling them is having to invest in both simultaneously. I can definitely see them doing something like HP and split off into Intel-Fab and just Intel. Would enable the arch/micro-arch to use all the fabs and allow the fab to focus on what it does best, processes research and development. Intel already fabs chips for other people (https://www.forbes.com/sites/jeanbaptiste/2013/10/29/exclusi...) why not expand that relationship to maximize their profits/capacity.

Intel has tons of money, and their core business is still a giant cash cow.

Exactly, break them apart while they still can.

I think there's too much synergy to be had by having the process engineers work closely with the architects when deciding on the design rules.

I am not an expert, but based on what I've read about this (my interest got sparked by the resurgence of AMD with Ryzen), Intel's vertical integration may actually even grow in importance.

The processes developed by Samsung, GloFo and TSMC are all optimized for low-power designs required by mobile applications. There are far more phones out there and they're on a much faster upgrade cycle than desktops/servers, that's why foundries optimizing for mobile.

This creates a problem for AMD because high power/freq Ryzen CPUs can't compete with Intel's if they're made on a node optimized for low power ARM cores.

GloFos new 12LP is perf optimisied, is it not?

LP = low power = not performance

LP is leading Performance

A future with ARM in server CPUs seems more plausible when Intel doesn't have a manufacturing advantage.

Also it is likely that Intel's loss of lead in process is one of the reasons that AMD (e.g. Ryzen) is actually competitive again.

s/ARM/RISK-V, and you have instantly nailed a top 1% upvoted post

Problem with RISC-V is exactly what makes it strong. The lack of verified software ecosystem will keep it from being main stream for at least a decade(something that until recently has held back the Arm server market, well, that and not having a reasonable server core..fixed with the ThunderX2). The fact that you can add instructions quickly is another problem, well, that and the lack of a standardized verification suite for the ISA so that software devs know that implementations are up to spec when they write code for them. I can definitely see RISC-V accelerators taking off though, driven by a more stable x86/Arm/Power core. To me, that path for RISC-V makes a lot of sense.

> The fact that you can add instructions quickly is another problem, well, that and the lack of a standardized verification suite for the ISA so that software devs know that implementations are up to spec when they write code for them.

There is a formal specification of both the ISA and the memory model. There are 2 working groups extending the formal models to the standard extensions.

Plus these formal efforts there is also a working group defining a sweet of verification tests that you have to pass in order to be qualified RISC-V.

The standard profile defined for Linux that will primary be used in the server space is RV65GC and most processor in this space will probably not have non-standardised extensions. I would expect a server core to have maybe vector and crypto extensions.

Ryzen is competitive despite being on an inferior process. Ryzen is competitive because AMD stopped playing in the mud and decided to catch up, that said it's sad/scary just how much core seem to be a head of it's time Intel has been riding the same uarch for over a decade.

The only problem with Ryzen is that it doesn't clock as high as comparable Intel chips, but then again, it runs cooler and uses less power - both of those are because the process GF are using is targeted at lower power mobile CPU's.

It really doesn’t run cooler nor does it consumes less power at the same performance envelope.

Intel calculates the peak max draw TDP AMD uses sustainable average over 2 min.

Zen is built on 14nm LLP it’s not a ulv/ulp process.

This is great. GlobalFoundries has joined the RISC-V community and they are seeing it as one of they ways that can help them compete with Intel.

Its really quite a clever move by them and I hope it works out.

See slides and videos:

https://content.riscv.org/wp-content/uploads/2017/12/Tue1236...

https://www.youtube.com/watch?v=FKwbFbFLkS0

It's weird how the sub-14nm date keeps getting pushed back. The end of 2018 is going to make it 4 years between chip generations. They still might fail though. Could this be the start of the great silicon stagnation?

Super excited to see what 2018-2019 looks like. If we have 3-4 high yield ~7nm nodes and the dram/nand markets start clearing again I think we'll see some pretty crazy prices for hardware especially with AMD/ARM pressuring Intel.

Hopefully Openstack will be a bit more mature then too. With lower hardware costs and an open source software stack cloud computing might get pretty competitive.

Alas, it seems OpenStack is still in the gutter. :(

It's a mindboggingly strange mess. Yeah, it works, when it works, but it's so undebuggable and unmaintainable. Well, if you have in house committers from the core projects, then you can afford to run custom forks/branches. Oh and a few dedicated Infrastructure Wizards deploying it, upgrading the components as patches land, managing outages and simple gotchas.

It's almost easier to roll a new non-multi-tenant instance for each tenant than to try to make it multi-tenant as both Horizon and Neutron are bad at handling domains.

And it [one of the neutron linuxbridge agents] sometimes randomly eats IP addresses from host interfaces :o

Oh, and the docs and release notes are still generally useless on compatibility changes, upgrade procedure and so on.

Actual logic design is done using standard cells so metrics describing standard cell size are more useful.

Is it really the case that all logic designs use standard cells? I would have expected full custom designs to maybe use a standard design for the transistor but the placement and sizing of the gates is completely custom (e.g. not on a grid).

It would be interesting to see first x64 only (only 64-bit) CPU from either Intel or AMD ...

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