Even as things got sticky due to advancements in transistor construction meaning that old metrics like gate length were obsolete, we were still roughly following the trend laid out ahead of us for decades. A new process would double your density, letting you roughly cut the size of your old chip in half.
...Until a few fab companies just up and decided "You know what, fuck it, we can't actually catch up to Intel, but if what if we just... say that we did?" (...and I wish I was kidding. Take a look: https://m.eet.com/images/eetimes/2013/10/1319679/20-Value.jp... vs https://m.eet.com/images/eetimes/2013/10/1319679/16-Value.jp...).
So pretty quickly, TSMC decided that they'd just advance the node table, despite not actually increasing the density by double as you'd expect. "Next generation" 20nm processes became "16nm" and "14nm" on marketing docs, despite the process capabilities not changing that much (or even at all in some cases), with the only thing close to a justification given is that "FinFETs are different. They perform better than planar FETs so we should be able to give them a new node name." GloFo and Samsung quickly took the bit and followed their lead as they began FinFET manufacturing.
And apparently since nobody blinked an eye or set off alarm bells about these fabs basically lying about their capabilities, they got away with it and are now continuing the trend downwards. "10nm" processes from TSMC, Samsung and GloFo measure up to Intel's 14nm, and now "7nm" processes measure up to Intel's 10nm. It's actually pretty surprising Intel hasn't thrown up its hands and joined them on the fun, or even come up with their own marketing spin on it yet. "Intel's new 7nm-xtreme manufacturing process (actually it's just 10nm+)" or whatever.