Spectre chip security vulnerability strikes again; patches incoming
zdnet.com
zdnet.com
Is there some other way we could architect chips or operating systems that would allow these branch predictors to go full bore instead of having to hamstring them? When this story first broke I know we talked a bit about the impetus to move code out of the kernel into user land.
A speculative load in cache is global today, and that leads to a possible side channel attack. One may think about marking a speculatively cached entry by its security context, the only context allowed to "see" it until the speculation is resolved. But that is not enough: the entry may have evicted another, and that's globally visible. Or one may not use the regular caches, but add another lookup structure (CAM) for in-fly speculative loads (and same for store), indexed by context.
Another source of complexity is: what is a security context? An OS could use existing structures like processes, and it makes sense, but it's not enough. For a sandboxed application a given process or thread could run untrusted sandboxed code (Javascript) and also trusted runtime. In this case, the application need to help and manage security contexts. It's possible, but not backward compatible.
I expect progress will be made, but considering the complexity/costs it may take some time...
Oh, this one goes elbows, armpits, neck, ten thousand fathoms deep. Now just imagine that every memory access that the processor does actually consumes another type of resource, which is memory bandwidth. There are a limited number of cache-fill lines and those can be occupied or not; after tracking down all of the state of things at rest, you now have to think about the information leakage from the occupancy of the various networks of the CPU--data in flight. Tougher to analyze, but also tougher to secure.
It's gonna be separate CPUs, memory busses, and disks if we really want to get rid of side-channels.
And that's actually simple. Simple is better for security!
It'd be safest to have a whole machine per process :)
Security compliance is becoming more and more like a ball and chain shackled to our legs. I expect security to slowly eat up a bigger and bigger share of processing power which translates to more sluggish chips, more sluggish software, etc.
Due to "Linux security properties" any random user-mode application is me and therefore already root and does not require an exploit to read kernel memory. The user-root-distinction is all but the thinnest of veils on a desktop Linux.
For Variant 3A, well, it's another Meltdown and will be handled as such.
I'm much more worried about things like this in edge machines that talk to the public than some backend data-processing pipeline that doesn't talk to the outside world at all.
>"Based on the difficulty to exploit the vulnerability, AMD and our ecosystem partners currently recommend using the default setting that maintains support for memory disambiguation.
We have not identified any AMD x86 products susceptible to the Variant 3a vulnerability in our analysis to-date." https://www.amd.com/en/corporate/security-updates
I couldn't (quickly) find a similar comment from intel.
Note that no microcode updates are needed for AMD, while they're needed for Intel.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/lin...