24/26 core CPUs have been in the market for quite a while. The caches generally look like this: each core has 32KB instruction + 32KB data cache (L1) and 1MB L2 cache. All cores share the 30-40MB L3 cache and the 4/6 memory channels.

In my experience, cores getting blocked for instructions is not commonplace. They can block waiting for data if the computation is memory-bound.

Edit: These are the specs for the [Skylake 8180](https://ark.intel.com/products/120496/Intel-Xeon-Platinum-81...). These chips are nowhere close to 5GHz though.