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I wonder if FPGAs could be a node too. That would allow us to mix programmable, highly parallel analog modeled acceleration onto the same high speed / direct connect bus as all the other fixed, traditional computing components. I really like the approach AMD is suggesting here, treating it like nodes on a network.

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You've been able to buy FPGAs tightly coupled with AMD CPUs since 2006 or so. The tech back then was to either plug them into an HTX Hypertransport slot, or in a cpu socket. Very few customers actually wanted to buy these things and I think all of the makers lost money.

They definitely are missing an application that probably won't be coming until specialized chip designs are a commodity (eg agi+). Right now you can get specialized chips for much less than the cost of the programmable chip + custom design. Once a company identifies a kick-ass fpga design (and it has any decent market) they move to asic to drive down costs. I guess if fpga costs were as low as an asic it would be viable as you could change the application depending on current needs. But currently fpga chips are 10-100x the cost of asics.

Hypothetically, yes. But FPGA's are very area-hungry; a big powerful one isn't going to fit nicely into a modestly sized package along with lots of other chips.

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