Zen 2 is adding 256 bit registers for 256 bit AVX instead of doing it in 2 passes with 128 bit registers.
1. Limiting it to a subset of chips, and initially not releasing it for client chips at all. Creating ISAs for a small part of the market is the best way to ensure it does not see any use.
2. Reasoning about AVX512 performance is ridiculously difficult for most workloads because of the clock penalty. Unless you have cases where you are all AVX512 all the time, you will likely see performance drops.