Microamp: Asymmetric Multi-Processing on Microcontrollers

blog.japaric.io

76 pointszdw3 comments

In the world of embedded Rust, all roads lead to Jorge. He has been doing outstanding work.

The automatic handling of the shared memory section with the linker script is really nice, I've previously manually hardcoded this when doing C. An "include" directive can ensure the right address is used, but enforcing/verifying the layout too is nicer.

On a lot of microcontrollers with multiple cores, there is a specific semaphore peripheral, that can be used instead of shared memory. STM32 has HSEM for instance. It would be interesting to see if this could be used by Rust in future, if this offers any benefits, and if this could be done in a somewhat transparent matter.

Interesting thought. I wonder if LLVM IR has a semaphore primitive? In which case it could map to the HSEM in STM32 or an instruction sequence for other machines. IR seems like the natural place to put this kind of functionality, especially since you need to guard either the HSEM or the equivalent sequence from being disrupted by over-eager code motion. (Which historically was a problem with gcc -- on the AVR architecture, at least, gcc liked to move SEI and CLI to the top of the function instead of leaving them in place, because there was no way to specify the idea that the interrupt mask bit was an absolute fence to code motion. Not sure if that is still true.)

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