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You're confusing instruction-set architecture with micro-architecture.

The x86-64 ISA defines 16 integer ("logical") registers, for example, however, Skylake has (don't quote me on the figure) 168 physical integer registers. For register renaming to work, you need more physical registers than logical registers because the logical registers need to be mapped to some physical registers, possibly multiple times (e.g. for speculation).

Those are the architectural registers. Physical registers also include those extra ones needed to implement register renaming to eliminate data dependencies. https://en.wikipedia.org/wiki/Register_renaming#Architectura...

Thanks, right I was confusing ISA level registers with those at the implementation/micro arch level. Cheers.

I'm not an expert on this topic, but are there additional registers for the extended instructions like MMX and AVX?