The cartoons in schematics are very much a product of their time - they were hand-drawn by skilled draftsmen who enjoyed drawing. I suspect most of them had a spare pad of doodles next to their work table.
If you compare this to the schematics of more modern electronics, they are often madness. Even though it is far simpler to re-arrange schematics using EDA, it clearly isn't done a lot, because parts are sprinkled around randomly, everything is just on one enormous sheet or everything is randomly split up across sheets with numbered net names making connections etc.
The places I've worked have pretty rigorous style guides, and I personally try my best to make schematics readable and understandable. I suppose this is the same thing as code quality guidelines: you can set expectations and examples, but folks don't necessarily have to follow them.
My cooler projects are all stashed away somewhere in a company drawer, but here's one that I did early on: https://bitbucket.org/cyanoacry/ee91/raw/5d934fdc18e556938dc...
1. We can ensure that they won’t explode when we use them.
(admittedly I understood very little after that ;P)
But, Wolfspeed's SiCFETs /do/ have a published SOA (see fig 22[2]), so maybe I should revisit this...
[1] Figure II-3: "Visual Image of the IRF1405Z failure. This type of visual pattern is more attractive when observed on the surface of the moon, instead of on the surface of parts that are trying to land there." http://www.irf.com/technical-info/appnotes/an-1155.pdf
[2] https://www.wolfspeed.com/downloads/dl/file/id/145/product/1...
- psu drawing: no left-to-right flow, connector names are numbered, output connector (CONN2) is just floating around on the left and connected via net names. Same pretty generic net name ("out") is used as in the main amp.
- amplifier drawing: the main feedback loop is obscured because it's only connected via net names, connectors are again just stashed of somewhere to the side and only connected by name and not labelled. I would also point out that each op-amp of the quad-op-amp U1 shares the same designator, so you can't talk about U1a, U1b etc., which you actually do in the text.
The left half of the schematic is arranged pretty neatly and logically, but the discrete output stage is pretty cramped over there (clearly limited by the fixed sheet size), though standard arrangements of the building blocks make it quite clear what everything is (U1c U/I conversion, current mirror to the top rail, mirrored back to the bottom rail with an x3 CM, resistive load to the top, emitter follower output stage, CCS as load, off to the output).