Could a meta FPGA, an FPGA that runs on top of an FPGA, be created in an HDL language? Why or why not?
Yes, if it worked, it would probably be much slower and less functional than the original FPGA, and would serve no commercial purpose.
But theoretically, could it be done? Why or why not?
If you define an FPGA as taking a bitstream configuration input, then you'd have to write (in Verilog) an engine to interpret that input and configure some LUTs and routing switches. Routing switches are efficiently implemented in an FPGA, but emulating one might require hundreds of other switches. So it's going to be very inefficient.