AFAIU one of the nice thing of the SiFive IP cores is that they were distributed with some kind of free license (although they still required other non-free IPs to be actually used in a chip). Is this still (or was it ever) true?
AIUI, the U5 series is BSD/open-sourced as "Rocket", and a version of their shared L2 cache is available as the sifive-inclusive cache. I believe Berkeley uses these artifacts as part of their FireSim (https://fires.im) FPGA-based infrastructure.