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Comment by londons_explore | Hacker News Reader

Hah... More importantly if you're a silicon startup and you need a CPU core for some brand new design, you are probably not tied to a specific instruction set.

The obvious one to choose in that case is RISCV because it already has a working compiler and Linux port, has a thriving community, and there are no paperwork delays to get a prototype built.

ARM is making its stuff free to try to compete with the free RISCV, in the hope that when that startup becomes a big company, migrating to a new architecture will prove too hard, and they'll be locked in.

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RISC-V ISA is just a programming interface and non-physical IP.

The license fees for ARM Processor families are mostly for physical IP for microarchitecture.

ARM provides selection of 40+ highly optimized physical processor IP cores for different purposes. Maybe you get eventually similar selection RISC-V architectures but they are not free. It takes lots of full time work to test and optimize those cores. If you write processor core implementation in verilog and give it away free you have done just 10% of the work.

Arm's competitive edge will whither, since other companies are frantically working on RISC-V implementations!

Physical IP for up-to-date silicon fab nodes is never free. But SiFive is already providing it for RISC-V - and other vendors could easily get involved too, seeing as good high-level designs (that can be simulated in FPGA with relative ease) are available with permissive licensing.

Sure, but from the pov of a startup that needs a core, the choice is whether you pay SiFive or similar, or ARM.

> Physical IP for up-to-date silicon fab nodes is never free.

This is baffling. My understanding of how a startup that wants to make its own custom CPU would work is this:

- Write Verilog or HDL sources for your CPU

- Test your CPU in sims and FPGA's, fix any bugs in the Verilog

- Send the Verilog files off to a fab

- Write a check in the $1 - $10 million range for the fixed-cost component of production (i.e. the mask)

- Get a shipment of ASIC chips for like a $1 unit cost

- ??? (your specific business model)

- Profit

Are you saying nobody has open-sourced Verilog files for a RISC-V CPU? This seems like something that's easily within the resources of volunteers, and is probably actually less work than all of the kernel and toolchain support.

What the hell is "Physical IP". Last I heard you either had IP or you had just plain old physical property. Not a weird combination of both.

It sounds like some convoluted way of making an end run around first sale doctrine by saying you bought the atoms that make up that processor, but you didn't purchase the arrangement of them; which sounds absolutely absurd.

Or am I missing something?

It's an industry-specific term. "Physical IP", as in the opposite of "logical IP", does not refer to atoms, but to a low-level specification ("netlist") of the transistor layout of computer chip components. You could compare it to machine code that is optimized for a very specific processor.

That is juxtaposition of terms is unfortunate... but thank you for clarifying. It's still IP, just in the form of a specification for physical components.

Better explanation:

Physical IP is the CPU design at the transistor level.

Logical IP is a spec document saying how the processor should work, plus a bit of pseudo code and maybe a simulator or two.

It depends for what you need that core. If you want to build a mobile phone, a router, a NAS, a set top box, a server, you might be better served by ARM since it has much better software support and their cores are already optimized for some scenarios.

SPARC is also free like RISCV but the greatest SPARC manufacturer, Fujitsu, is moving over to ARM 64.

It doesn't matter if an ISA or a core is free if it will cost you very much to make optimizations so it's fast enough and efficient enough, to fit it for some fab like TSMC and have the software ported and bugs sorted.

RISC-V has a nice system for extending the architecture, either in public or with vendor extensions.

This is the opposite of what you want for a having nice software tools.

The way it works is your software tools let you write the basic RV64GC code, and you use a bit of inline assembler for your custom instructions. Usually the custom part of the code is small and hidden behind a library.

You are correct, right now Arm has better software support etc.

But how long will that last? The competition is not happy paying Arm large fees, and it may well happen in the long run that RISC-V will have a better eco-system. 5 years? 10 years? Arm is a small company (~6k employees) in comparison with some of its competitors. Arm giving free access is a sign that they are beginning to worry!

Moreover there are geo-strategic considerations for some countries: what if global tensions rise and Arm gets strong-armed into withdrawing from selling to e.g. Baikal or Huawei?

>ARM is making its stuff free

As I've read they only provide free access to some of it's cores but you will still be required to pay the licensing fees if you use them.

It's like being able to read the source code for free but pay if you use the software. Pretty much what Unreal does with it's game engine. You can read the code for free, toy with it how much you like, build anything you want but at the moment you gain money from it, they want their share, too.

Yeah – ARM is just making it easy to get access to their IP while you’re in the strapped-for-cash startup mode. Once you start producing and selling you’ll be on the hook for licenses like anybody else.

Yea this method has worked for everyone else:

* Oracle with Databases, Servers and Tooling

* IBM with servers, COTS packages

* Microsoft with OS, ActiveDirectory, Skype/Teams etc.

* AWS / Google / DigitalOcean etc.

Is your argument that every tech business has a free dev/test tier?

I don't see an issue with Arm giving free stuff (I think) to startups, but if they started paying (bribing) startups to use ARM designs instead of something else, even RISCV, then there should be huge repercussions.

ARM will have to eventually support RISC-V before they succumb. If they innovators dilemma now, they might save themselves, but they would need to figure out what they are to become. The moat is no longer around the ISA, they should be doing design engineering and delivering systems, and selling systems and components.

If ARM doesn't transform, they will die like all the other Unix vendors did when Linux took their lunch.

I think there is far larger chance that RISC-V will fail to materialize than ARM will eventually support it.

I think RISCV will just end up occupying the same space that MIPS did before --- ultra low cost (and performance) devices.

Which is funny, really, since for a long while MIPS provides amazingly high-performance parts used in Silicon Graphics (SGI) workstations.

As someone who is far removed from the hardware and instruction set relationship, when would one need a new processor and instruction set? How do you know you're at that point?

You want to make a new ASIC for some application and you don't want the hassle and cost of having to negotiate a license with ARM. Recent RISC-V chips that I've seen have been used for machine learning for vision in cars, camera controllers, crypto co-processors, hard disk controllers, massively parallel co-processors (also for ML), GPU controller, "hard cores" embedded in FPGAs.

The real chips doing all those things in actual applications are not RISC-V

So far. I wouldn't bet against free and zero friction however. Arm themselves are clearly worried otherwise the announcement in this article wouldn't have happened.

i actually just started a job in hardware in sv and i see most people reaching ARM, its a nice set

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