Show HN: Bit Serial CPU

The PDP-8/S was a bit serial version of the popular PDP-8 minicomputer. It was introduced in 1966 and is said to be the first computer sold for under $10,000. It used discrete transistors, no integrated circuits. It was slow, with a 36 microsecond add time.

https://en.wikipedia.org/wiki/PDP-8

http://homepage.divms.uiowa.edu/~jones/pdp8/models/#PDP8S

Hello HN, here is a project that I have recently finished, it is a very niche CPU written in VHDL and verified to work on an [FPGA][]. It is a 16-bit [bit-serial][] CPU, which means the processor is incredibly slow taking 102 clock cycles to complete some instructions, the trade-off is that the CPU is very small, almost being free to implement in terms of floor space on the FPGA, the entire project takes just 73 slices, with the CPU itself taking 23 slices.

The cross-compiler and the cross compiled program, a [Forth][] interpreter, are available at:

<https://github.com/howerj/bit-serial/blob/master/bit.fth>

It compiles down to an image that uses just 4802 bytes (out of 16KiB).

And a C simulator if you would like to try out the Forth interpreter but lack an FPGA to try things on is available at:

<https://github.com/howerj/bit-serial/blob/master/bit.c>

You can type:

make run

To build the C simulator and run it on a pre-compiled image. Typing 'words' and hitting return shows you a list of all defined functions.

In all likeliness the project will not have that much utility to anyone, but I have wanted to make a bit-serial CPU after completing my previous FPGA project because the architecture is quite rare nowadays and might be something of a curiosity.

[bit-serial]: https://en.wikipedia.org/wiki/Bit-serial_architecture

[Forth]: https://en.wikipedia.org/wiki/Forth_(programming_language)

[FPGA]: https://en.wikipedia.org/wiki/Field-programmable_gate_array

[VHDL]: https://en.wikipedia.org/wiki/VHDL