Server grace storage will specify if power loss protection is included on the board. You can usually identify the capacitors as well. For example, they are the yellow rectangles near the edge of this Intel SSD: https://ark.intel.com/content/www/us/en/ark/products/96932/i...
Note that the Intel drive with PLP is 110mm long, which is 30mm longer than most consumer M.2 SSDs due to the additional capacitors. This won’t fit on certain consumer motherboard.
From diving into this recently in speccing out a budget system for myself, it looks to be mostly the lower end budget chipsets and motherboards that don't support it. At least that's what I've seen of the regular sized ATX boards, but it may be a different story for Micro-ATX or Mini-ITX.
The relevant info is always in the specs, and will look something like:
M.2 Slots
2242/2260/2280/22110 M-key
2242/2260/2280 M-key
For each of those, the first two numbers are the width, the rest denote the length. So 2280 is 22mm x 80mm, and 22110 is 22mm x 110mm.Intel's Optane SSDs don't need power loss protection capacitors because they don't cache writes—their 3D XPoint memory is more or less fast enough to not require it. These drives correctly advertise that they do not have a volatile write cache. I have not encountered a consumer NVMe drive that lies about having a volatile write cache, but I have not attempted to test how they behave when the host requests that the write cache be disabled.
I stopped trusting Crucial when they released the P1 though. That QLC drive is terrible on every metric. Performance falls off a steep cliff once you do any writes at all, and often never quite recovers. Tail latencies are in the 1 second range, which is insane for an SSD.
https://www.intel.com/content/www/us/en/products/memory-stor...
I found this review which makes it sound pretty reasonable:
https://www.tomshardware.com/reviews/intel-h10-qlc-flash-opt...
https://www.kingston.com/en/ssd/dc1000b-data-center-boot-ssd
I'm planning to replace it by the SSD linked above.
I was already aware of the power loss issue on consumer SSDs (from the 2013 piece http://lkcl.net/reports/ssd_analysis.html), but I wanted to see it happen for real. I guess I did now.
Although I've had problems with hardware hanging so completely that it does not respond to the reset button, and the only option is to cut power, so UPS does not provide full protection.
E.g., https://blog.tripplite.com/line-interactive-vs-on-line-ups-s...
A lot of them are pretty similar; 19V - 21V seems quite common.
Until recently phones were standardized on 5V. Now, it's a mess again. :-(
Then a battery pack could provide that, as DC.
Is there a standard for PSU's about how long they provide power, that SSDs could design to?
Yes. The ATX power supply spec has timing requirements for the PWR_OK signal. As described on Wikipedia:
> The ATX specification requires that the power-good signal ("PWR_OK") [...] remain high for 16 ms after loss of AC power, and fall (to less than 0.4 V) at least 1 ms before the power rails fall out of specification (to 95% of their nominal value).
So power supplies are expected to continue operating through roughly a single missing cycle of AC power, but they only have to give the system 1ms of warning when power is going out. This signal would have to be delivered to the SSD by software in the form of a shutdown notification (a write to a particular NVMe register).
And now that I think about it, that shutdown notification mechanism probably warrants inclusion in the article.
I was hoping for a post-1995, more usable spec since we know that current PSUs often do provide power longer than 1 ms.
A single AC cycle would be 16-20 milliseconds which could already be doable if the SSD got the signal right away without OS involvement.
This potential failure mode is possible when storing more than one bit per flash memory cell, and using a multi-step process to program the cell voltage, and mapping the low-order bits of a cell's value to different LBAs than the high order bit. Drives need to have the capability to either complete or safely abort an in-progress cell program process so that the value in the high-order bit(s) isn't corrupted by an incomplete programming of the low-order bit(s). And this power failure problem isn't the only reason why SSDs need to be careful about leaving cells in a partially-programmed state.