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Comment by vmception | Hacker News Reader

I bought few a cheap Stratix V's from eBay too.

Useless. The drivers are horrible and the state of the tooling is insanely bad. The vendors have no clue, Intel personnel have no clue as they don't care about OpenCL 2.0 but will still gladly charge $10,000 in licenses if you really want to go that route. Verilog/VHDL is wtf, and you still need to redo your drivers.

So much potential.

I talked to a couple companies that use these in production, they reveal that they wrote their own drivers and still have issues.

You pretty much have to be a Microsoft doing sci-fi tech to get the benefits out of these, and it doesn't have to be that way.

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TBH that situation doesn't sound too different from most FPGA tooling

oh its not, I've heard the exact same thing from Xilinx users. The whole space is ridiculously bad and undermaintained while simultaneously having come a long way. I'm probably not the first person over the last 35 years to say this, but they are right at the cusp of a big breakthrough in utility.

OpenCL was a nice try but everyone did their own thing with it and are now going back to their own vendor specific frameworks. No leadership, irreconcilable business decisions, unnecessarily crippling an open source community, software licenses are too expensive probably because they can't mass monetize the FPGAs. Its just really bad, it doesn't seem like it belongs in this century.

This is why projects like SymbiFlow[1] and Chisel[2] (and many others) exist.

[1] https://symbiflow.github.io/

[2] https://www.chisel-lang.org/chisel3/

The tooling is bad because it is a Katamari Damacy of 3rd party libraries held together with wheat paste and boogers. The majority of the software was not developed in house, and they pass the savings on to the customer.

The FPGA vendors see themselves as ASIC replacements so from their perspective they are "killing it" across all metrics. We know where this needs to go.

Doing new drivers is not a huge deal. At least you are programming them in C with sane tooling against a sane API. Getting up a simple setup with a bit of DMA and a few registers is not that hard. It pales compared to the amount of pain you will go through working with the FPGA tooling. The insanity begins with the fact that they are very GUI centric with comparatively little guidance on batch processing capabilities. This is despite the fact that you usually run these tools on ~80 core servers, so you have nicely lagging X11 windows all day

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