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Comment by tlb | Hacker News Reader

One effect it doesn't capture: A language that's twice as efficient will go (roughly) twice as fast and use half the electricity. But if you have a fixed amount of time to compute the answer (such as 1 screen refresh interval,) you can run the CPU slower so the efficient language finishes at the same time. CPUs get more energy efficient at lower speeds. For a given process, energy/op is roughly linear with clock speed.

So if you have a fixed deadline, a 2x efficient language can save you 4x the power.

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> CPUs get more energy efficient at lower speeds.

intuitively i agree but how does this fall in line with the 'race to idle' concept?

would love to see some graphs with operations-per-watt for different cpu/arch.

‘race to idle’ doesn’t seem to be the preferred approach anymore. Instead we’re seeing CPU designers go down the path of multiple different sized cores, with different speeds and power consumption.

So in this world more “efficient” task can be run on slower lower powered cores. Stuff that needs to happen as quick as possible is don’t on faster, higher powered cores.

When you can, you just turn off the bigger cores completely.

I don’t have benchmarks, but there must be some good power savings in it if ARM have built their BIG.little architecture around it, and Apple followed suit with their processors.

race to idle is mainly for responsiveness, not efficiency.

>CPUs get more energy efficient at lower speed. or a given process, energy/op is roughly linear with clock speed.

That is not true. For any given node process, with the same CPU design there is an optimal energy efficiency curve with regards to its clock speed. Any lower doesn't save you energy per workload, higher means you are paying Exponentially more energy.

Another effect: your computer is on for the entire time you're writing the program. Picture it: you have a .csv file and a laptop with one hour of battery life, and you need to run some stats on it. Are you more likely to complete your task in Python, or in C?

What? In CMOS energy / op is constant unless you have dynamic voltage scaling. Which processors have this?

Certainly my Ryzen 3700x has some degree of dynamic voltage scaling. You can see the voltage changing in Ryzen Master. I think intel has it too but not sure.

Also, I am not sure it is correct that energy / op is constant, even at a given voltage? I'm no expert but I read about this when I was thinking about overclocking my device. At a given voltage, higher frequencies still use more energy due to the capacitance of all the components on the device. This is why overclocked energy dissipation scales super-linearly with voltage. Because you aren't just increasing the voltage you are increasing the frequency as well.

> What? In CMOS energy / op is constant unless you have dynamic voltage scaling. Which processors have this?

Approximately all computer processors.

Yeah, I looked into this some more. High end ones seem to have it, but most MCUs do not. Anyway, there are many issues with taking advantage of this. I don't think it's very likely that you're going to get the ideal linear decrease per frequency. There are arguments to made for run fast until stop, because it reduces the effect of leakage current, see:

https://semiengineering.com/is-dvfs-worth-the-effort/

AFAIK low-power MCUs are always used in race-to-idle fashion because nothing beats <<1 µA sleep.

For computer processors, DVFS isn't used like OP suggests, it's really more like Dynamic Temperature And Power Scaling (DTAPS), because it's meant to extract maximum performance from available power and thermal budget. Also while CPUs _do_ change power and frequency at >1 kHz, they're intentionally designed _not to_ downclock in the example GP gave (inter-frame idle).

I was under the impression that CMOS consumes energy on gate transition and not constantly, so the speed translates to more current consumption.

I don’t think that CPU can adjust its power like that. And if it could, you could use it in C in the same way.

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