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Comment by nickmqb | Hacker News Reader

The screen is connected to the FPGA over VGA. The output resolution is 1024x768 @ 60Hz, but the 3D portion of the screen is rendered at 256x128 @ 30Hz. The design consists of a custom 16-bit CPU (running at 32.6Mhz) and a custom raytracing "GPU" that can handle up to 4 rays in parallel.

Input happens via a N64 controller! Those are actually fairly easy to work with at a low level.

The code is not public, though I'm considering open sourcing the project when it's done. Moreover, there's a lot of additional details that I could potentially go into, so I'm considering also writing a few blogs posts with more info if people are interested!

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Pretty impressive; definitely interested in hearing more.

Did you use your Wyre [1] language to develop it? I saw the examples on Github, and seems pretty interesting. Its cuts quite a bit of the verbosity of Verilog. I'll give it a try.

[1] https://github.com/nickmqb/wyre

Yes, I'm using Wyre for this. Feedback is always welcome, so once you've had a chance to try it, don't hesitate to let me know what you think!

Wow! This is really cool, thank you for open sourcing this! Do you have any posts talking about how you got started with FPGAs? I'm a SWE and want to get into this area. Your language seems to map directly to what I was sort of expecting to see in the HDL/VHDL world but wasn't finding. You're making me want to buy a VGA monitor and an iCE.

Just do it ;). I don't have a blog post on how I got started, but you gave me the idea that perhaps I should write one.

In terms of hardware, I'm using an iCEBreaker dev board [1] which has worked really well (A nice bonus is that the board has a 16MB flash chip, which can be used for storage -- this is what the Minecraft clone uses to load the map and textures from on startup).

On the software side, I'm using the open source yosys/nextpnr/icestorm toolchain which is a lot faster than the vendor supplied tools. I mostly figured things out by just trying stuff, so a high iteration speed definitely helped here!

[1] https://1bitsquared.com/products/icebreaker

Definitely write one. Wait for it. It would be great.

It looks very cool! What's the GPU & CPU written in out of interest, I think I saw on your twitter you've written something to translate to verilog, is that used for this?

Yup, that's correct, the design is implemented in Wyre, which is a hardware definition language that I created. The language compiles to Verilog so it can work with existing hardware development toolchains. The language is open source and can be found here: https://github.com/nickmqb/wyre

I like the sound of that, but my verilog's rusty, a suggestion for the readme: show what the equivalent verilog would be for the example, or better I suppose the actual verilog that it would transpile to.

I suppose your target audience is mainly more familiar with verilog (though not necessarily I suppose - could have only ever used VHDL) but I'm interested in playing with it, just haven't used verilog, or FPGAs at all, since university.

Take a look at the examples dir on github: https://github.com/nickmqb/wyre/tree/master/examples

Then look at the "output" subdirectory and you'll find a verilog generated file for each example of the parent directory.

Very interested, please do!

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