I believe this is the real thing that make superscalar OoO (ie. JIT to VLIW in silicon) win.
I believe this is the real thing that make superscalar OoO (ie. JIT to VLIW in silicon) win.
I consider it to be roughly as important as being able to reorder instructions across non statically determined branches and function calls. And both of these expose the fundamental weakness in explicit VLIW, if it's essentially nondeterministic it cannot be taken advantage of.
Then we naturally have some other benefits, like hyperthreading. Which basically is just compiling two instruction streams together on the fly.
For it to work statically (although it really could be halfway in between), it would probably require a complete paradigm shift away from the current way we think about cpu caches
Regardless of whether it'll work or not, I'll be very happy if the mill ever makes it onto a chip.