Micro Magic RISC-V Core Claims to Beat Apple M1 and Arm Cortex-A9 | Hacker News Reader

Micro Magic RISC-V Core Claims to Beat Apple M1 and Arm Cortex-A9

eetimes.com

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EEMBC is a very poor benchmark for anything but very small embedded workloads (the datasets generally fit in a desktop CPU's L1 cache), but Micro Magic's claims are even more ludicrous. To quote the person in the article (Andy Huang, apparently their advisor):

"Using the EEMBC benchmark, we get 55,000 CoreMarks per Watt. The M1 chip is roughly the equivalent of 10,000 CoreMarks in EEMBC terms; divide this by eight cores and 15W per core, and that is less than 100 CoreMarks per Watt."

Almost every claim in this is wrong. There doesn't seem to be a published score for the M1, but looking at some Intel/AMD CPU scores on the EEMBC website [1] suggests a score of 50K points per core for comparable CPUs like the Ryzen 9 3900X. So the M1 is more likely around 200-300K Coremarks, not 10K. The M1 also consumes around 15W for the entire SoC, not 15W per core. The real Coremarks/watt of the M1 is probably closer to 20K than 100.

Suddenly 55,000 Coremarks per watt for their chip doesn't sound so impressive when you realize the M1 also contains a full LPDDR4X memory controller, GPU, neural net accelerator, etc. and has 10x the IPC even on this extremely simple benchmark...

[1] https://www.eembc.org/coremark/scores.php

No idea how valid these are, as I'm not entirely sure what I am doing. The single threaded one seemed to spread the load over a couple of cores, but they remained mostly idle. The other tests ramped up to consume a core per thread

CoreMark 1.0 : 30866.579211 / GCCApple LLVM 12.0.0 (clang-1200.0.32.27) -O2 -DMULTITHREAD=1 -DUSE_PTHREAD -DPERFORMANCE_RUN=1 / Heap

CoreMark 1.0 : 111219.240929 / GCCApple LLVM 12.0.0 (clang-1200.0.32.27) -O2 -DMULTITHREAD=4 -DUSE_PTHREAD -DPERFORMANCE_RUN=1 / Heap / 4:PThreads

CoreMark 1.0 : 162568.583621 / GCCApple LLVM 12.0.0 (clang-1200.0.32.27) -O2 -DMULTITHREAD=8 -DUSE_PTHREAD -DPERFORMANCE_RUN=1 / Heap / 8:PThreads

So it seems too be about 30k for each of the performance cores (max 3W/core = ~10k/W), and 10k for each of the efficiency cores (max 0.3W/core = ~33k/W)?

Of course, the CPU frequency doesn't immediately ramp up, so I guess this isn't a fair assessment anyway, and I can't tell what the frequency/power consumption of each core - just going off published stats.

Either way, the figures in this article are far from reliable.

Deep in the article: “per Watt”.

The m1 is a 8 core cpu; a design with a larger number of cores is going to be faster provided that the task can use all the cores.

They are making these claim using the EEMBC benchmark. This must be an interesting benchmark as they claim the fastest chip on the EEMBC benchmark is a Cortex-A9, a 8 year old design.

Their figure of merit is performance per watt, not performance.

Well, their figure is performance per core-watt, which... isn't really a meaningful statistic:

"The M1 chip is roughly the equivalent of 10,000 CoreMarks in EEMBC terms; divide this by eight cores and 15W per core, and that is less than 100 CoreMarks per Watt."

Unless they think that the M1 is drawing 120W?

Then won't the Context A-53/55 would be better comparison

Looking at the Wikipedia article for the CoreMark benchmark [0] they are using, it seems to be specially geared towards testing CPUs destined for embedded systems use. So I'm not sure how fair a comparison this is to the M1 which is decidedly not meant for embedded workloads.

[0] https://en.m.wikipedia.org/wiki/Coremark

Some more details here including some speculation on which process this chip might be made on.

https://www.eenewsanalog.com/news/risc-v-core-out-clocks-app...

Clock frequency is not everything and it's not necessarily good if somebody tries to solve something with raw power. Unfortunately the RISC-V instruction set is crippled performance-wise, by design. It looks like a clone of MIPS, which is a textbook implementation of a clean and well-thought ISA, except that the delay slot and a couple of things have been removed. Critical and frequent code fragments are two times longer compared to ARM, needing 2x the CPU clocks to execute, so there goes the high clock frequency... For details, take a look at this: https://news.ycombinator.com/item?id=24958423

The A9 is a 32b core from 2010 (it was used in the iPhone 4S SoC), the M1 is a high-performance 64B SoC from 2020. I’ve no idea what they’re even trying to say here.

CoreMark numbers in general are here https://www.eembc.org/coremark/scores.php

Claim they do 11k Coremarks vs an M1's 10k Coremarks. But lots of chips we now know are slower than the M1 are on that list as higher Coremarks. Weird. Gonna ignore this one.

« The architecture is fully scalable for the mobile industry, for PCs, automotive and data centers. We are completely self-funded, so are not seeking funding. »

Well, if their claim is true, they’ll be billionaires pretty soon

Extraordinary claims require extraordinary evidence. Where is it?

Agreed. And these kind of numbers are pretty meaningless to me unless and until I can actually see 'em in practice, i.e. on my desk.

This is not intended as a desktop part.

I am also dubious, but at least am willing to consider their metric of performance per watt.

> This is not intended as a desktop part.

And I never said otherwise. Maybe "workbech" or "garage" instead of "desk" would be the more apt term :)

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