You don’t just go and make ever part of your chip architecture wider by being clever. Well, there was probably some cleverness involved, but it’s not like this has been a one-off trick.
By clever I mostly mean, from what I've seen from reports, handling stuff like transition from x86 to arm by baking in instruction translation into the die. Their approach with some things is a bit different from what others are doing, but it's not like they wholly invented a new 2nm process that breaks what we thought the laws of physics were, they're using the same fab as everybody else. Thus their design at the moment is clever.
There’s no hardware instruction translation.
there is little hardware assist though: TSO can be enabled and disabled and thus simplifying x86 instruction translation by implementing the x86 memory model in hardware and thus avoiding unnecessary memory barriers
This is Apple we are talking about. The last 20 years have been tricks.