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True, but inventing a new language for asynchronous hardware wouldn't be as big of a job as reinventing an industry standard like VHDL. Something like a small lightweight concurrent process description formalism with a Petri net based operational semantics would do nicely, and such things have been well understood for decades. The hard part is for it to gain traction.

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As Moore's law slows down, this time for real, there have been a few unorthodox ideas lately. 3DIC, or Cerebras' whole-wafer CPU. This looks like a thing worthy pursuing. With free money and big corps racing for a market first (disruptors trying not to be disrupted), who knows.

I wonder how much in terms of power-performance-area can be gained from going asynchronous.

There have been many quantitative studies presented over the years at the IEEE Async conferences [1]. The best use cases until now have been niche applications calling for ultra-low power where performance isn't too critical.

[1] https://asyncsymposium.org/

Ladder logic already exists and was designed for documenting and programming asynchronous clock-less computers. The problem is that it's like programming C++ in the early 90's where every hardware vendor sells you their own proprietary implementation.

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