A nice approach I'm hoping will gain traction when discussing density across different types of logic is the "LMC" metric, as put forward by some TSMC and Stanford folks: https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=9063714

Improved semiconductor device density directly translates into benefits for more advanced computing systems— the primary driver for progress in semiconductor technology. Thus, we propose the use of the following three-part number as a metric to gauge advancement of future semiconductor technologies: [DL, DM , DC ], where DL is the density of logic transistors (in #/mm2), DM is the bit density of main memory (currently the off-chip DRAM density, in #/mm2), and DC is the density of connections between the main memory and logic (in #/mm2). As an example, today’s leading edge technologies that are published in the literature [15]–[17] can be characterized by [38M, 383M, 12K]. As another example, 3-D stacking of multiple logic and memory dies can increase DL, DM, and DC .