Reading through it, it's making the right tradeoffs for good utilization. Basically trading LUTs for BROM, which is what you'd want at this level.

I haven't synthesized it though, so I can't say for sure.

It's indeed a pet peeve of mine when an FPGA project doesn't give example utilization, but in this case they mention iCE40UP5K and M2S025 at least.