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Comment by virtuallynathan | Hacker News Reader

Wow! I hope someone with more knowledge can chime in, but it looks like a 5x5 cluster of chips on the 2nd from the top PCB, along with 20 pairs of other chips along the perimeter. The bottom of that PCB seems to contain a bunch of high density connectors, then several layers of mechanical parts, and finally another PCB with a bunch of high density connectors. Strange!

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Pieced together more info:

    Top plate and middle gold plate are water cooling

    Bottom thick PCB with connectors is VRMs/Power distribution

    Based on TSMC InFO_SoW, chips are ~26x26mm (~676mm2), close to the TSMC 7nm reticle limit

    Each 300mm wafer yields 25 chips, so each module is a full wafer

    20 pairs of chips around the perimeter are likely IO/SerDes

    may be like the Cerebras WSE with only on-chip SRAM and no external memory

    Each chip could be up to ~400W, meaning each module is ~10kW+, more for power losses, IO, etc

Thanks to: https://twitter.com/idontwa86202030/status/14225661791310438...

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