Renesas enters FPGA market with the first ultra-low-power, low-cost family | Hacker News Reader

Renesas enters FPGA market with the first ultra-low-power, low-cost family

renesas.com

219 pointsdetaro85 comments

For any Renesas folks reading this, you should consider throwing in with the open-source Icestorm toolchain.

Icestorm brought a ton of exposure to Lattice's low-end FPGAs, and that was with no official support from Lattice. Renesas could have that too. If you have to spend money on software anyways, why not spend it improving the overall ecosystem? The marketing impact could be huge for getting the word out to designers like me that hate the big-names' toolchains.

They use yosys apparently.

Nice! What about place/route?

Not sure, just saw a screenshot of their tooling somewhere with yosys output showing, didn't have time to poke around myself yet.

https://hdl.github.io/awesome/items/vpr/

https://github.com/YosysHQ/nextpnr

There is no mention on those pages on whether Renesas uses those tools.

Here's hoping they open source their modifications.

IceStorm is a part of SymbiFlow [1] now.

[1] https://symbiflow.github.io/

There is even a free/open-source Verilog IDE which could be used and which works well with Yosys: https://github.com/rochus-keller/VerilogCreator

I just ran a synthesis of their include demo Blinky and it ended with:

End of script. Logfile hash: 00b456ea46, CPU: user 3.19s system 0.13s Yosys 0.10.0 (git sha1 a743417f0, clang 12.0.0 -fPIC -Os) Time spent: 63% 17x read_verilog (2 sec), 6% 1x synth_xilinx (0 sec), ...

11/21/21 12:03 PM > Finished running Yosys with status: 0

(!!!)

I'm not an industry expert, but I wonder if this product is aimed at customers that have been hit hard by the electronic parts supply chain problems.

If you have some small IC doing some simple digital logic, and the SKU is sold out, that 50c part could prevent you shipping a $200K luxury car or whatever. Throw in this FPGA, program it to emulate the part, and you can keep shipping your products. Little daughter-boards can overcome any pinout, voltage differences, or whatever.

From what I've heard, if some specific IC is out-of-stock, all of the compatible ones are also likely to be out-of-stock. Even if you scrounge up some compatible parts, next month you might run out of some other IC. It's like whack-a-mole in some industries. With something like this, at least in principle you could order one generic "gap filler" part and cover your bases, at least to a degree.

This line is more of an extension of Dialog's existing options, which were extremely limited, reconfigurable logic devices. Dialog sells the Greenpak devices as flexible interfaces, and for a variety of niche applications; I looked at them a number of times, but they're not as flexible as the marketing materials make them seem.

This.

>2021' - In February 2021, Renesas announced that it has agreed to buy Dialog Semiconductor for $5.9 billion.

So a little sad Dialog ends up like IMG / PowerVR.

No sadness for Dialog, I'll never forgive them for the utter abominations that are their cheap Bluetooth LE micros… Cortex-M0 with an SWD debug interface, this should be just like an nRF51, right? Hahaha, no, it's completely proprietary undocumented garbage with a Dialog SDK burned in ROM and — get this — tiny one time programmable memory for the "application" (cost-cutting to the extreme?).

This is hard to do because all the other characteristics of all the circuits would have to be changed, you need different engineers, etc. Over the long run maybe this switch will happen, but the supply chain issues will be gone before anyone with an existing complex product like a car has a chance to start replacing individual ICs with FPGAs

You'd be amazed at how fast carrier boards with FPGAs on them can be made to solder down to existing sized pads to replace a no-longer-available part when a manufacturing line is shutdown due to parts availability. I wouldn't discount that Renesas has already been selling these FPGAs for exactly this purpose and mass production using them has already been happening for months.

Often big customers get access to parts long before they're public knowledge. Renesas has a whole bunch of automotive customers already for other product lines.

It's fairly rare to see a 'simple digitial logic' chip on a PCB nowadays. In no small part because even entire microprocessors are mostly cost-limited by packaging and placing on the board, not the cost of silicon. So anything that even a small number of customers want to do in digital logic gets adsorbed into either the microprocessor or the peripheral.

I think it very much depends on what market you're looking at. Often times on designs I've worked on there's a whole pile of logic gates and other simple discrete circuits which help to do housekeeping type tasks, like synchronizing power-up/down or reset circuits. Often the specialized sequencer chips are VERY expensive so a handful of discrete logic gets thrown at the problem.

If you could replace a square inch of discrete logic which handles power-up/down and resets with a $0.50 FPGA you can program such that you can even better control your design and even maybe match better what the power-up/down or reset sequence should be, that's going to be an interesting thing to watch in the market.

Can confirm, have used MachXO chips in that space before. Despite the marketing literature, they're full FPGAs, not CPLDs.

Mass availability will take too long for this to be the aim.

Regardless, there's a lot of uses for a FPGA in this power and complexity bin.

This will be competing with e.g. iCE40 and GW1N-1.

Considering that Renesas has had plenty of their own issues with part shortages, it would be a little... concerning if they had decided to build new product rather than the parts their customers are screaming at them for.

Luckily (or not), these parts don't appear to be available yet either.

I always cast a wary eye towards new Renesas parts.

I got burned on the RZ/A line. It was a promising part. Low cost Cortex-A9 with DRAM on the die that could run Linux XIP off of the SoC when combined with a cheap QSPI NOR flash.

But the software was just undercooked and undersupported. When I could finally get an FAE in house to assist he explained that the Mitsu and Hitachi houses still didn't get along and it was nearly impossible to get stateside assistance. There was one single person in the USA responsible for Linux BSP support.

So yeah nice hardware but no, don't count on the software to be there on time.

Neat. Need to wait a bit longer:

> The first ForgeFPGA device, the 1K LUT offering, is expected to be available in production quantities in Q2 2022. Interested designers can visit https://www.dialog-semiconductor.com/products/greenpak/low-p... to find out more.

> * Very low power as low as 20 microamps standby > * Very low price in volume of well under US$ 0.50 > * Free, downloadable software with no license fees that includes both schematic capture and HDL modes

And the bold statement

> * Proven ability to deliver very high volumes

I wonder if they've concluded that the semiconductor squeeze will be on its way out in Q2, so this is really a PR stunt.

> I wonder if they've concluded that the semiconductor squeeze will be on its way out in Q2, so this is really a PR stunt.

Q2 of what year, though? STM keeps reporting me no deliveries until Q2/2023. I had to buy $.80 chips at brokers for $35 and other silly things lately, just to keep my product in the marked. And that was just the remaining low volume of usually less than 200 pieces per broker deal. Almost the same horror with NXP. With Renesas so far I could just order another 50k pieces here and another 200k pieces there and they just kept (or rather keep) delivering. I wouldn't just call it a bold statement.

> I wonder if they've concluded that the semiconductor squeeze will be on its way out in Q2, so this is really a PR stunt.

Renesas has significant amount of their own fabs, so it might be bit more than just PR stunt. Although I don't know if these ex-Dialog parts would be produced in Renesas fabs or some other place. And last I checked they are still the biggest microcontroller supplier in the world, so they probably know their field.

I know it's probably not critical to their bottom line, but I hope some variants come in a hobbist solderable package - QFP or at least QFN.

From the design software:

Package: QFN-24

Supported Development Platforms:

• ForgeFPGA Development Board + ForgeFPGA Socket Adapter #1 Description: The SLG47910V provides a small, low power component for common FPGA applications. The user creates their circuit design by programming the One-Time Programmable (OTP) Non-Volatile Memory (NVM) to configure the interconnect logic, the IO pins, and the Macrocells of the SLG47910V. This highly versatile device allows a wide variety of FPGA applications to be designed within a very small, low power integrated circuit. The macrocells in the device include the following:

• Dense Logic Array:

◦ Equivalent to 900 4-bit LUTs;

◦ 1.8 k DFFs;

◦ 5 kb distributed memory;

◦ 32 kb BRAM;

◦ Configurable through NVM and/or SPI interface;

• 50 MHz High-frequency Oscillator:

◦ 3.41 MHz Low-power mode;

• Phase-locked Loop (PLL):

◦ Input from external source or internal oscillators;

• Power Supply:

◦ VDDIO: 1.71 V to 3.6 V;

◦ VDDCore: 1.1 V ± 10%;

• Power-On-Reset (POR);

What kind of applications are these very low cost, low gate, FPGAs used for?

Hooking up two otherwise incompatible busses. For example, say you want to connect an SPI flash device to something that only supports NAND flash - you might use one of these FPGA's to act as a kind of converter.

Probably custom high speed interconnect or glue logic that cheap MCUs cannot do. This is in relatively high demand given the current chip shortage. If this can do in-circuit programming, it’s huge.

And, what rate can you clock them at?

You can use these to replace a microcontroller doing a simple job it was not fast enough for, or burned too much power for, or you can't buy any of just now.

It feels funny to write this, because we used to say you could put a microcontroller in, in place of custom logic if it was fast enough. The best 6502 project I have seen put an 80MHz microcontroller on a 40-pin DIP format board, that bit-bangs out a 6502 on the pins. It has enough RAM to copy 64k in and execute from, where timing isn't critical.

That sounds like a fun project.

Here's a Z80 variant: https://j4f.info/z80-mbc2

Fabio has also done boards for the NEC V20 and 68K

What a clean design. I wished my 'daily driver' had such easy interface options for hardware.

>And, what rate can you clock them at?

High occupation projects on iCE40 LP1K (closest thing) easily clock 70-100MHz in my experience.

We can guess, but that seems pointless.

Look at Lattice’s marketing material. They have tons of applications covered. Mostly protocol converters, level shifters, all sort of glue logic, gate drivers an so on.

One real world example: The pebble time used a small FPGA to act as a display controller for their custom ePaper-like color LCD display.

Allowed them to interface with the non-standard display on a cheap off the shelf microcontroller, without having to waste power bitbanging. As a bonus, the bitstream also included the startup splash screen which would show instantly, before the cpu even got around to initializing the display controller.

>The pebble time used a small FPGA to act as a display controller for their custom ePaper-like color LCD display.

Minor correction: the pebble time uses a standard off-the-shelf Sharp Memory LCD display[0]. These displays are commonly used on smart watches so they're not propriety to Pebble. Sharp ships these displays as complete modules, with all control logic built-in, so you just need to supply power and serial commands to drive them. Any standard microcontroller can drive these.

You're right that Pebble chose to put an FPGA between their main microcontroller and the Sharp Memory LCD though.

[0] https://www.sharpmemorylcd.com/

Not an EE but I know exactly what I'm going to use these for: Playing with old CPUs so that I can implement all the bus and decode logic and some peripherals in it. Something like this[1] but even simpler. They'll probably be used for similar but more realistic stuff, i.e. as reconfigurable glue.

1. http://www.mattmillman.com/projects/8od/

Why not simply get one of the many cheap development boards that are available right now and with much larger FPGAs instead of waiting an unspecified amount of time for these?

These devices are painfully small for something like this and it is not clear whether they have any hard adders and multipliers.

yosys and minimalism mainly. As a hobbyist, I like to work with as little as I can get away with for fun and art.

I think professionals will be more interested because of the price.

Fair enough!

If their tools are anywhere close to decent, it would be an instant success

These are being made by Dialog and looking at the tools appear to be a relative of the GreenPAK devices. They were essentially very very small mixed signal programmable logic devices but the data sheets detailed every bit in the bitstream. With any luck these new parts will be the same. They are already using Yosys for synthesis.

Oh that's some nice info, with their low price point (around 0.25$ for the low-end ones) the GreenPAK devices appeared to me like a gamechanger in the making. I hope they gain more traction in the future.

Exactly, but I've given up on hardware companies ever making a good software product. I think that hardware companies are full of hardware engineers who made a little Javascript app once, and who assume that making software is easy. And they promote from within, so suddenly your software team is run and operated by people who made a Javascript app once.

I wonder if it will have any block rams?

If so, it becomes big enough for mini CPU cores. Little CPU cores enable far more usecases - for example "upload this thing to a server via ethernet" isn't practical with 5000 gates of hardware logic, but a CPU core with 2kbytes of block ram and a little hardware logic on the side makes that kind of thing practical.

Why don’t you want to buy classical microcontroller for such task? It’s cheaper, has more performance and faster development time. FPGA area is higher for a CPU softcore compared to a normal silicon CPU.

Not sure about GP's specific case with Ethernet, but for some tasks that "little hardware logic on the side" can be the difference between some bit-banging operation taking one clock cycle vs. 200.

Because of supply chain issues, for one.

Is this chip somehow special and prone to supply chain issues? I am just curious.

Edit: I get tons of marketing materials daily about new various electric components. Fun thing is that while marketing department is sending advertising I can buy the parts mostly only in 2023.

There are plenty of cases where the sequential logic for an FPGA may end up resulting in something looking like a custom CPU implementation. Development wise it may end up cheaper to just pick up an existing architecture and build in custom instructions for the specific parts that make it particularly expensive (either computationally or latency wise) for a traditional CPU.

How common are MCUs with mii or gmii interfaces? Certainly more mii than gmii, and at what price points? Not very common and not too cheap in my experience.

It will have BRAM. There’s a detailed information about one of these ICs in their software - ForgeFPGA Workshop.

SLG47910V has: 32kb of BRAM; 900 LUT4 equivalent; 1.8k DFFs; 5kb of distributed RAM; integrated 50MHz OSC, PLL.

Thanks for digging up those details!

Looks perfect for implementing a small 16-bit CPU core with a handful of peripherals; wonder if it'll come in a hobbyist-friendly package?

QFN-24

You can download the free toolchain now and start coding today with verilog, etc. for this target. Waiting on the datasheet from factory.

I wonder how the economics work for this - it's great to have cheap FPGAs like this, but I suspect Renesas will need to produce a lot of IPs for people to use on these devices. With a cheap FPGA device like this you need quite big scale before this starts to beat a more expensive chip since you're going to have to going to have to get an FPGA developer to write your IP and that's going to be atleast in the region of tens of thousands in dev cost. It was always the problem that the big fpga companies ran into - at small scale the development costs are prohibitive, at large scale the unit costs lend themselves to custom asic production. The result is you're constantly chasing this mid-scale niche, pushing at the boundaries by pushing your process advantage vs custom ASIC and by pushing the tooling to lower the cost of development - neither of which proved to be very successful.

I hope they get that stuff on par with the rest of the Renesas quality quickly. So far I've been very skeptical about the whole Dialog acquisition. Plus Silego is a whole different story altogether ...

Oh this is very cool! The market deserves some competition.

Especially considering how fucked Xilinx and Altera customers are these days. Now's the best possible time for competitors to hit the market hard.

Nor Lattice, nor these guys can compete with Xilinx and Altera (or AMD and Intel as they are called nowadays). Lattice’s portfolio ends where Xilinx starts. So absolutely no overlapping and therefore no competition.

> Lattice’s portfolio ends where Xilinx starts.

Sorry for nitpicking, but there is some overlap when looking at the high-end Lattice FPGA offerings, e.g. ECP3 with >500 IO and ~150k LUTs in its top configuration (the usual caveats apply regarding comparing LUT counts from different FPGA designs).

Lattice will go big on the LUT when their advant platform comes online

Thanks, it is very promising indeed. Just found their press release.

Looking on DigiKey there is almost no supply of the GreenPak devices that are being rebranded/supplanted. Which is a shame because these look really neat.

These are 1-2k LUT devices. Even the smallest Spartan - XC7S6 - is 6K LUTs. It's not enough to even mildly inconvenience the leaders.

I don't see that necessarily as a negative.

50c FPGAs with 1k LUTs won't directly compete against Xilinx or Altera's flagship offerings (or in many cases even their low-end ones, as you rightly point out) - but it will create a new market for low-cost, low-power semi-complex custom glue logic.

I agree. There's so many little use cases where a tiny FPGA would fit in perfectly but the cost of the powerful mainline competition make it a non-starter. If these can stay cheap and continue to draw as low power as they do I can see them carving out a very nice and healthy niche in the space.

Agreed. There are lots of downstream applications where these could do a lot. I just meant, GP's point doesn't add up.

I assume this is just their thin-edge product. Gotta start somewhere, and it may as well be carving out a new niche.

I see it more as competing with Lattice, Microchip and things like Intel MAX10.

What is stopping you from using 16 of them? For maybe bit-slicing? The PCB-layout, routing/timing and EMF?

It's just a pain to write and configure that many different devices each with I assume external SPI ROMs and bitstreams. Timing analysis would also apply locally, and you'd have to propagate that through yourself. Since they're each buffered at the edges, I don't think EMF is a big consideration, but timing would be a challenge. I expect routing to be the least problematic as you can just route the signals to external pins in whatever configuration you want.

The tools are claimed to be Free with a capital F, is this really true?

I don't see any reason to doubt. ForgeFPGA is said to be successor of GreenPAK, and GreenPAK tools are capital F free. Get it from https://github.com/azonenberg/openfpga.

These aren't official vendor tools.

It's really surprising for any player in the IC design world to publish anything using free software. Normally the software is proprietary and costs $10k/seat/year at a minimum.

$10K/seat/year? That's a fantasy. Maybe if you just want to look at a schematic. As soon as you start actually doing something useful the price per seat goes way up.

"at a minimum."

You're not wrong, but it's important to keep in mind that for more complicated FPGAs, they have hard IP blocks in them often supplied by other companies. Also consider that when these IPs have errata in them, they can sometimes be worked around with FPGA soft logic. Oh, and parts of the software are supplied by companies like Synopsys.

As far as I am concerned though, Synopsys is essentially Autodesk, and Blender is taking over!

Symbiflow compatibility?

Does that even fit a small RISC-V processor?

It's not meant to.

The smallest RISC-V processor for FPGAs that I know of[0] needs 1.2K LUTs on ice40 FPGAs, so maybe barely

[0]: https://github.com/BrunoLevy/learn-fpga/tree/master/FemtoRV

Reply on news.ycombinator.com