I think I remember reading an Intel article about something like this not too long ago. You can't just do this because of a few factors. When you start stacking the die like this, the latency grows. You now have to wait for signals to travel up through multiple processor die before it gets to the die that will process the instruction. It's this reason that you end up with diminishing returns when making processors "taller".

Not only that, but unless you can increase the speed of the FSB by 100 times, you will have a serious bottleneck between the processor and the motherboard. You're now funneling 100 CPU's worth of information through a socket and medium designed for 1 CPU.