Intel joins RISC-V international and invests another billion in foundry | Hacker News Reader

Intel joins RISC-V international and invests another billion in foundry

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44 pointsvanburen12 comments

I'll wait until Intel actually gets and then keeps a foundry customer across more than 1 node / product. Intel's track record is not good. Most recently Achronix abandoned Intel as a foundry, and the regularity of FPGAs makes them one of the easier products to manufacture on a new process. Is anyone else even willing to risk using Intel as a foundry today?

We cannot talk about Intel supporting arm without also mentioning how Intel sued Nvidia for merging arm and Intel into their motherboards. Arm was better at 1080p video in 2008 at low power. This made great fan less pcs. And something I was looking forward to for a while.

Great news! Is there anyone here already using RISC-V for smth non-embedded?

I attempted to port an AVX-512 neural net code generator (it produces stand-alone C code for, say, ResNet-50) to RISC-V vector instructions... but the conversion was unexpectedly complicated. Too time consuming, so I abandoned the project. The variable-width vector instructions are awkward.

I checked https://NN-512.com and gituhb, trying to grok.

reading: https://gms.tf/riscv-vector.html

VLA (vector length agnostic) indirection makes the execution harder to control?

So... RISC-V does not provide instructions for each exponent

  MMX(64), SSE(128), AVX(256), AVX512(512)

and therefore the the compiler/assembler/human needs to use the input-length-agnostic instructions which the hardware lowers to operations that are implementation specific?

Thanks. Yes. Let me give you an example of the difficulties: The NN-512 code generator knows (with AVX-512) it can do an efficient (up to) 16x16 transpose, and makes heavy use of lane permutations. But with RISC-V vector instructions, you don't have that knowledge and you can't do the lane permutations efficiently.

What about Itanium ? I heard this is the best processor.

Itanium is based on the EPIC architecture (not to be confused with AMD's EPYC processors) which is an evolution of the VLIW architecture.

VLIW architectures are based on the idea that instruction scheduling should be fully done at compile-time rather than mainly at run-time like modern superscalar processors do.

Compile-time instruction scheduling removes a lot of logic from the circuit and therefore potentially consumes much less energy. However it requires more logic on the compiler side.

But it's still today very complicated to build efficient VLIW compilers. Apart from very specific tasks like signal processing, VLIW & EPIC architectures has been abandoned.

Unfortunely AMD has a license to clone Intel CPUs and came up with AMD64.

I always wonder if it is possible now to create an open AMD64 now that it has been 20 years later.

It has always been unclear for me if an instruction set falls into patent protection (20years) or in copyright law (a lot more). I think (not a lawyer) that it is allowed to reuse ideas inside another instruction set after 20 years (patent law). But I din't think it is allowed to freely make a compatible clone before ~70years (copyright law)

Could instruction sets be considered an API?

Seeing as APIs are considered to not be copyrightable [0], but their implementations are, if an instruction set is an API they would be outside copyright.

0: https://arstechnica.com/tech-policy/2021/04/how-the-supreme-...

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