> Microcontrollers have SRAM, but so do processors. That's where the firmware runs before it gets the DRAM running.
Which microprocessor architecture does this?
> Microcontrollers have SRAM, but so do processors. That's where the firmware runs before it gets the DRAM running.
Which microprocessor architecture does this?
I regularly use the 1788 + a meg or two of DRAM to hold an LCD framebuffer. The LPC has a really nice interconnect between EMC and the internal LCD controller block and will drive the display all on its own (with a hardware cursor) once it is initialized.
> LPC is a family of 32-bit microcontroller integrated circuits by NXP Semiconductors.
Not a microprocessor. You are the second guy to pull this on me. Do people even read what i write? Did i write unclearly?
It has a x86 Microprocessor architecture, but it is not IBM PC compatible because it does not has an BIOS, instead using a more embedded-style RedBoot setup.
Maybe you should do a quick web search before talking shit.
"chipset" is very different than a traditional microprocessor chipset though on that. E.g. you don't have an exposed system bus outside the CPU, but rather specialized interfaces. (And ARM systems have evolved the same way over their history)
Traditional microprocessors are getting really rare, even though pretty much all the modern architectures started as them, and thus some use the term more widely. Some vendors use the differentiation between microcontrollers and application processors now, which also isn't a 100% clear line and explicit crossover models existing, but more useful today and avoids the fights over "what's a microprocessor today". (where "application processor" ~ "can reasonably run a full OS like Linux"). But that's also often limited to discussion in embedded use cases again, e.g. I don't know if they'd call a standard desktop CPU that or insist on some arbitrary level of "embeddedness"... Not that standard desktop CPUs don't end up embedded, but that's another discussion entirely.
For the article, i don't want to leave it standing as it is. Redefining "Microprocessors" as "having an MMU" is making communication about these topics very unpleasant, especially when its about Retrocomputing. Same pains as i ranted about in https://news.ycombinator.com/item?id=30278936 .
"Emulation" evolved to mean virtual machine, now people are denying that wine or xterm are emulators.
"Operating System" evolved to require virtual memory and paging, now people are denying that MS-DOS was an operating system.
"Microprocessor" evolved to mean computing chips with MMU, im waiting for people to deny that the 8086 was an microprocessor because it does not have an MMU.
The infinite shitcycle of people improvising language instead of researching.
https://web.archive.org/web/20150928042254/http://wiki.wineh...
I mentioned the shift of meaning to "virtual machine" in the post you replied to, please read it more carefully.
Emulation and Simulation are different in some regard: emulation is only imitating some aspect of a thing, while simulation imitates a thing by using (usually physical) models.
xterm is a VTxxx emulator, and VT simulator does look like this: https://www.pcjs.org/machines/dec/vt100/
I totally agree with your main point though that emulation is a broader topic than is generally thought.
Also, back in the day emulators emulated the CPU for sure, while an API implementation wasn't never called "emulation". Ever.
2) SRAM is almost always on the die, not external. Here's a die shot of a random STM32 (cortex M): [1]. The SRAM is quite obvious.
x86 being the classic example. Here [1] is an example of a microprocessor board, you can see the MX support chips on both sides of the CPU. As you can see, the RAM (and the most of the address space-mapped things) is not on-chip. The bus is wired across the PCB.
[1] https://upload.wikimedia.org/wikipedia/commons/d/de/386DX40_...
All the RAM you see on the motherboard is DRAM. It's a totally separate thing and happens to be what the FSP initializes after it loads stuff into SRAM.
The BIOS starts running on the x86's internal SRAM.
https://stackoverflow.com/questions/63159663/how-does-bios-i...
I've done this with PowerPC cores that no one would call microcontrollers.
https://www.coreboot.org/images/2/23/Apollolake_SoC.pdf
https://blogs.coreboot.org/blog/2019/07/17/gsoc-how-to-run-c...
https://9esec.io/blog/open-source-cache-as-ram-with-intel-bo...
The TLDR is that you need to get DRAM running before you can use it (e.g. by poking at DRAM controller's registers until it knows how to talk to your stick of RAM reliably and at a comfortable speed). Until then, you're stuck with SRAM. On ARM SoCs and Intel Apollo Lake, you use addressable SRAM. On most other x86 systems you use cache as RAM. Cache is just SRAM though, and the only difference between ARM and typical x86's case is that the latter doesn't let you directly address it.
You can find examples of DDR DRAM configuration in u-boot sources, and presumably in coreboot too.
As far as I know, all of them. It's possible that there are historical systems where DRAM configuration is fixed, but I wouldn't know about it. Any modern system requires rather complicated configuration to get the DRAM going.
Excluding the caches, this is how x86 functioned for quite a while, i don't know until when.
Microprocessors don't require internal RAM to bootstrap, because they expose their bus and its simple to map a ROM to the starting address, which can be executed from directly.
All of them. They have to. Sometimes the trick is using cache as RAM. Some Intel CPUs do early memory init this way, for example.
You need some memory somewhere to run the complex DRAM init procedure.
Which bus is "the bus"? SoCs and microcontrollers alike expose a bunch of different buses.
I'm assuming Naumann arch, with instructions and data on a single bus.
If anything, the things people today refer to as microcontrollers have more to do with your legacy microprocessor than they have with a high end CPU or SoC.
What's the right term to use?