Hey, thanks! I wrote this in Rust because I am comfortable in it + proc-macros, but someone might port this to Lisp or such.

As I explained it in another comment, this aims to make it easier and more approachable for learners to learn about hardware. I (personally) feel HDLs can be a bit scary, and as this is in a higher level language, you get its familiarity and still get to think about pins and their connections and stuff.

As you mentioned , this is indeed choose-your-difficulty library. You can make everything out of gates, or as I did in my CPU demo, expose pins for connections, but do the internal processing using if-else and loops etc. (https://yjdoc2.github.io/pcb-rs-examples/) This allows focusing on stuff like how caches are invalidated on jumps and how waiting on memory takes CPU cycles etc.

Currently this does not translate to something that can be targeted to directly h/w like VHDL etc does. But hopefully this will make subject of hardware and low level systems more approachable and easier to learn.

Thanks!