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Comment by lynguist | Hacker News Reader

There is a massive design gap between all Apple designed chips and non Apple designed chips. Apple’s chips are ridiculously humongous. They’re built for extremely wide, high performance applications for the past 10 years. A single A14 core can do 64 32-bit floating point operations in a single clock cycle. AMD/Intel were long at 16 operations and only the latest Intel went up to 32 operations.

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Well, Intel's latest chip has better performance than M1 despite being two process nodes behind. So not sure what you're going on about

Apple optimises for performance per watt. That the biggest Mac Studio is almost silent when fully loaded is remarkable when compared to my Intel desktops that start screaming the moment I start video conferencing.

Endless series of comments that don't understand the manufacturing side of processor development...

The Intel parts that perform similarly to their Apple counterparts need at least twice as much power (and cooling). There’s no magic in either.

I find the different balances of performance and efficiency cores interesting. I’d love to have a lot more Icestorm cores on a Mac to play with background tasks that don’t need the firestorm ones.

On the Intel side, I’m also disappointed by not having the option to implement the missing instructions in software.

apple's performance per watt is a remarkable accomplishment. but the second half of your comment has more to do with the anemic thermal design of windows OEMs than anything else. my intel desktop (9700k with 5ghz all-core OC) is also barely audible while running anything less intense than prime95. it just takes a large air cooler with a sensible fan curve. dell could easily do better with a custom case if they actually cared.

1 process node behind. Intel 10nm has similar or better transistor density as TSMC 7nm.

You're right.

But even being one behind, it outperforms M1, with lower efficiency. Thus reasonable to speculate that a process node advancement would at least put Intel's chip on par with M1 on both perf and efficiency

> Thus reasonable to speculate that a process node advancement would at least put Intel's chip on par with M1 on both perf and efficiency

We'll see, but I highly doubt that Intel-at-equivalent-of-TSMC-5nm will be performance/watt competitive with the M1. Apple gets that power efficiency via an extremely wide-and-deep design that intentionally trades off a surprisingly low max clock ceiling (3.2GHz) for power efficiency while maintaining an absurdly high IPC (something like 75% higher than Intel's IPC at only one process node smaller) that makes it much more competitive on performance than conventional industry wisdom ever expected (there is and has been for years a strong belief that a design as wide as Apple's would be grossly inefficient because you could not possibly extract enough instruction level parallelism to keep so many decoders/execution units saturated -- hence we've spent over a decade with 4-5 wide frontends being the "practical maximum" that allows them to still target ~5GHz turbo speeds, which was believed to be basically the best/only path to high performance within what was believed to be the limit of "achievable" IPC. The M1 blows these fundamental assumptions out of the water).

So Intel makes conventional design decisions that make up the performance of their lower clock-for-clock IPC by turboing well north of 5GHz, at the cost of consuming something like 7x the max power of the M1. A single node shrink isn't going to buy them a 75% increase in IPC (their last 4 or 5 node shrinks combined haven't bought them that much IPC increase), so Intel@equivalent-of-TSMC-5nm still going to have to burn power like crazy to stay competitive on performance, and that's going to cost them efficiency that the node shrink just can't paper over.

It will lead in absolute perf, but its not going to be nearly as efficient.

Some people care only about maximum absolute performance, others care for performance per Watt. I find the latter much more sensible. What performance Apple can reach in, say, 50W, Intel reaches in 150W.

I have a list of instructions per clock from SPECINT results which I compiled from Web sources. (I didn’t verify the results myself.) I added in rumored future processors with their highest rumored performances:

  Cortex-A73 (ARMv8-A)  64.4
  Pentium M   69.0
  Bulldozer (AMD FX)  76.2
  K10 (Phenom II)   76.7
  Goldmont Plus (Atom 3rd gen+) 77.5
  Core    80.0
  Bobcat    81.3
  Nehalem    90.0
  Cell (PS3)  93.5
  Jaguar (PS4)   93.5
  Sandy Bridge  100.0
  Tremont (Atom 4th gen) 100.7
  Ivy Bridge  105.8
  Cortex-A76 (ARMv8.2-A) 114.7
  Zen   115.9
  Haswell   117.6
  Zen+   119.3
  Gracemont (Atom 5th gen) 120.8
  Broadwell  121.5
  Skylake   124.0
  Zen 2   139.8
  A10 (ARMv8.1-A)  139.8
  Cortex-A77 (ARMv8.2-A) 141.0
  Sunny Cove Ice Lake 146.3
  Cypress Cove Rocket Lake 147.6
  Zen 3   167.4
  Golden Cove Alder Lake 175.6
  A11 (ARMv8.2-A)  186.0
  Cortex-X2 (ARMv9-A) 190.2
  Rumored Golden Cove+ Raptor Lake (’22) 193
  Rumored Zen 4 (’22)  207
  A12 (ARMv8.3-A)  213.8
  Rumored Ocean Cove (’23) 223
  A13 (ARMv8.4-A)  235.0
  A14/M1 (ARMv8.5-A) 236.7

> AMD/Intel were long at 16 operations and only the latest Intel went up to 32 operations.

Intel has had 256-bit dual-issue FMA since Haswell (2013); that's 32 flops/cycle/core. AVX-512 doubled the vector length for Xeon Phi and was generally available in 2017 Skylake.

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