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Comment by FullyFunctional | Hacker News Reader

My only interest in this is as an FPGA dev kit. It was surprisingly hard to find details on the actual hardware but it appears to be a Xilinx™ Artix A7 200T according to https://shop.trenz-electronic.de/en/TE0765-03-S001-MEGA65-hi... That page curiously doesn't specify the amount of external DRAM, but various hints suggests it might be 8 MiB of HyperRAM (that's DRAM with a simpler protocol). Cute.

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I was wondering the same thing. I wonder if they could produce a "lite" version without some of the physical components (like the floppy disk and "expansion port"), and maybe some of the retro stuff swapped for cheap modern bits, like USB.

Does anyone know if the FPGA code that makes this thing work is open source? It might be a nice starting point for some other hobby project / processor architecture experiments / etc.

It's on GitHub.

Nexys 100T was recommended as a stand-in until you get the real mega65, that it's pretty much the same thing once set up. So, one could view it as a lite version: https://shop.trenz-electronic.de/en/29376-Nexys-A7-100T-FPGA...

Is a high performance HyperRAM controller really simpler than a normal DRAM controller? It's serial rather than parallel so you need higher frequency signals for the same bandwidth.

Yes, significantly so. However you saturate the bus with less effort (lower frequency, less wires), so perhaps the simplicity is due to a lower theoretical performance.

> First-generation HYPERRAM™ devices supported up to 166 MHz DDR clock frequency whereas as second- generation devices that now support a clock frequency of 200 MHz have a peak data transfer rate of 0.4 GBps. [0]

400MB/s for 8MB chip? Sounds enough for me.

[0] https://www.infineon.com/dgdl/Infineon-AN226576_Getting_Star...

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