Dan Luu has a take on this: http://danluu.com/butler-lampson-1999/
Even accepting the distinction (which I don't agree with) between "non RISC-y" ARM (v7 and earlier) and "RISC-y" (v8 and later), Apple M1 is "RISC-y" by that definition (instruction set ARMv8.5A)[1]. And it's doing well.
[1] Line 256 https://github.com/llvm/llvm-project/blob/main/llvm/include/...
It is more RISC than ARMv7 was. And I think if it was targeting smaller CPUs with less wide decoders, being more x86-like ("CISC") and having variable length instructions would be better.