> The reverse-engineering solves one mystery about the flip flop ... Looking at the reverse-engineered schematic, though, explains that a sharp pulse on the J pin will act like the clock, sending a pulse through the capacitor, turning off the transistor, and causing a high output. I assume this behavior is not intentional, and J inputs are expected not to transition as sharply as when I touched it with a ground wire.

This paragraph caused chills to run up my spine. The fact that they used AC coupling on the clock line seemed clever because it saved a couple of transistors, but the fact that they depended on J and K always being "slow" was cringeworthy. If J and K were somehow not slow, the device would become "not a proper flip flop." And yet it went to the Moon, so I guess they knew something I don't.

One other thought: When Ken grounded the J line, he was attaching it to essentially zero impedance to ground. The clock line will never have zero impedance, but it's reasonable to expect it to have lower impedance than regular signal lines. The sensitivity on J and K might be more a function of signal impedance than rise/fall time per se. Of course the two things are not unrelated. Potato/potahto.