The "3nm process" has no bearing on the actual size of the gate's or anything like that and is purely a marketing term.
https://en.wikipedia.org/wiki/3_nm_process gives a reasonable summary in its introduction.
My remembrance of the specific quantum effects that you're thinking of are from quantum tunneling[1] of electrons. The problem occurs when the gate size gets small enough that electrons can pass through without the transistor being switched on, which starts to happen around 3nm.