> A major reason I think this won't work is that transistor size no-longer limits the density of the chip. Nodes below 20nm have transistor contacts (what connects the silicon to metal), and metal tracks that are much larger than the transistor. The contacts typically limit the pitch between transistors and hence the density. A lot of innovation is now done to shrink those elements rather than work on the transistor physics/materials/size directly.

Layman question from not GP, but wouldn't reducing the "overhead" around transistors increase the transistors-per-area metric and thus be at least somewhat useful?