It means they probably tried to do too little in each clock cycle. Some multi-cycle operations could have been made single cycle...
Or, they designed the part for one silicon process, but ended up changing path and manufacturing on a different one late in the design process.
Either way, the outcome is the users will be paying more per part than they needed to.
There are very few embedded applications where you need more computation power than a RP2040 can offer without being limited by RAM or flash. Sure, they could have tried pushing it even harder, but why bother when it is already enough?
To be fair to them, I think it was a fairly inexperienced design team making their first silicon, in relatively low volumes (10's of millions). They weren't an established player trying to make a 1 billion+ production run super competitive product where fractions of a cent matter.
Clock signals on big motherboards are great RF radiators and hard to shield. But on a SoC, they aren't much of an issue.