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Comment by panick21_ | Hacker News Reader

Actually Moores law is dead. His prediction was not transistors would get smaller. His prediction was initial that for 10 years was that density would double every year. And then later that it would double every 18 month.

And this held longer then even he thought. But it has ended. While things still get denser, its no longer on that same trend.

This interview with Moore explains it:

https://www.youtube.com/watch?v=gtcLzokagAw

History by Cantrill:

https://www.youtube.com/watch?v=TM9h89Vo_Qo

David Patterson perspective:

https://www.youtube.com/watch?v=kFT54hO1X8M

Opposing point of view Jim Keller:

https://www.youtube.com/watch?v=oIG9ztQw2Gc

Patterson response to Keller:

https://www.youtube.com/watch?v=Qz0eJA1TP3Y

There are talks by David Patterson, Jim Keller and

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The prediction wasn't that density would double. It was that "number of transistors on a chip" would double every year, and it was basically just marketing. That actually held up somewhat longer than the density doubling did, since chip area grew to fill the gap.

density would double every year

I'm not a physicist, but I think they need to get smaller to do that.

They haven't been doing so at that rate for a very long time.

Smaller transistors is one way to get more transistors per chip. Chips could also get bigger, or the transistors could be packed in more densely (my VLSI is rusty, but not all transistors are minimally sized; a wider transistor can be used to push more power for example).

And how sustainable is making chips bigger or packing transistors more densely without making them smaller as a solution to getting chips with more transistors?

This is more of an engineering question than a physics one I think.

GPU dies are quite large compared to CPU, ballpark 2X to 3X, so I guess we could get a generation to generation and a half of transistor doubling out of increasing the size of the chips at least.

But the question is, do workloads benefit from all these transistors? Server workloads, I guess so, you can get some pretty big Xeons, or lots of transistors per package with AMD and multi-chip packaging. Consumer workloads, I think the issue is more that consumers don’t have these massively parallel workloads that servers and workstations have. Consumers have stated their preference by not paying for more than a handful of cores per chip.

The obvious way to get more transistors per core is fewer, bigger cores per chip. But changing the cores is a big engineering project. And yield issues are already a big problem, which would only become worse with more complex circuits. But until we end up with one core per chip, I think we have hit an engineering/economics problem rather than a physics one.

And the engineering/economics problem is a really big one, I mean AMD has had great success by going in the opposite direction; breaking things up further with multi-chip packages.

But the question is, do workloads benefit from all these transistors?

That's not the question at all, this was about transistors getting smaller. Now you're way out in left field talking about how gpu chips being bigger than cpus somehow means that transistors don't need to get smaller, benefits, workloads, cores per chips and a lot of other irrelevant strange goal post shifting.

All I said was that transistors are still shrinking and density is increasing, I don't know where all this other stuff is coming from.

Chips are not getting bigger really. Its just very large 'chips' are multible chiplets package in on bigger part. And that's not what Moore was talking about.

GPU dies are pretty big, right?

I’m just saying it is possible to follow Moore’s law. Physics didn’t limit us, engineering and economics did. Multi-chip packaging is a fantastic response to the engineering/economic problem of low yields.

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