How can you produce such a wall of text over a little misnomer? You obviously understood that I am referring to the current incarnation of the ARMv7 ISA, a.k.a the Cortex family.
And for the cores being compared here, on tight microbenchmarks the superior execution resources[1] and OoO execution of an A9 will put it ahead of an Atom, but on pointer chasing code the superior branch predictor of the Atom will probably give it a higher IPC.
EDIT: [1] Well, really the 16 vs 8 registers, 3 operand instructions, and free barrel shift in each instruction. I think they have the same number of ALUs and AGUs.