Working Ternary ALU (2019)
louis-dr.github.io
louis-dr.github.io
But in order to use ternary in a real processor, as suggested by the article, we would need a much more formal definition of the voltage levels of the gate.
Something like this: https://www.egr.msu.edu/classes/ece410/mason/files/Ch7.pdf
Without that it’s not clear how one could do timing analysis or do dynamic gate resizing to deal with practical issues like fanout.
Also, without the more formal definition it’s not even clear, to me anyway, what figures like 22 are even measuring.
>"In a paper in 2001 (link below),
balanced ternary and phinary were molded into one very impressive number system
, using properties already aparant in phinary the system was able to become balanced. With a
radix of (1+√5)/2 and three posible symbols {-1,0,1}
..."
https://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.9....