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That’s a massive extension. 32 GPRs! And they’re finally reusing an encoding made reserved in long mode (D5 - AAM in legacy modes).

Guess Intel’s feeling the pressure from Zen 4 supporting AVX-512.

Where did you see 32 general purpose registers? There are 32 vector registers in avx512 and avx10. Did I miss it?

32 GPR is a different extension, APX (Adv. Performance Ext.), which also has arm-ish predicated insturctions.