We are a lot closer to the Landauer limit than I thought
twitter.com
twitter.com
For GPUs it's a similar story - a 780Ti does 5.5Tflops@250W, a 4080Ti does 66Tflops@400W, for a 7.5x increase. Certainly not 100x, and again a lot of that is from much much more efficient GPGPU architectures.
TSMC themselves claim ~30-40% improvements on transistor efficiency every generation these days, which fits nicely with a 4-5x improvement. Manually multiplying their claims in efficiency, you get a 4.85x improvement from 28nm to 3nm.
I think we'll be hitting the limits of what silicon can do 3-4 orders of magnitude before Landauer's limit.
(Sorry, transversal practical question.) Nitter has many elisions. Do you know how to have them all expanded (see all originating posts)?
Almost a decade and a half is quite a while for this sort of thing, has it actually started on the same trajectory?
I know TSMC does incredible r&d, process engineering, HVM etc, but wouldn’t this land in the ASML bucket?
i.e. making things infinitely smaller (even if we thought it possible) might not actually result in improved power efficiency per operation anymore, sometime soon.
Since ASML's technology (to the layman) seems to be mostly wrapped up in making things smaller, accurately, then I can't see how this would be ASML's problem to solve, if we believe that the Landauer limit can't be broken.
The onus would be on the architectural side, of finding more efficient ways of getting the higher-level results we care about, reducing the number of minimum-energy operations required to get to those results.
Or maybe I'm misunderstanding something?
Both the process and tool needs to innovate to enable each other to get the most out of both.