As an example, the TI Hercules is an old but by no means obsolete safety processor. It's one of the best ways to get single-core lockstep capabilities for new designs today. The original TMS570LS parts are still built on a 130 nm process, but the "newer" (not new, but also newest) TMS570LC parts are on 65 nm.
These days most of my work hours are focused on the Aurix TC3xx, which is a 40 nm (tweaked 45 nm) part. This is a multi-core safety processor with an obviously higher transistor count than the Hercules (which is why it was selected for application), matching its smaller process.
Similarly in FPGA land, the Lattice MachXO is on an 130 nm process, while the newer MachXO2 migrated to 65 nm. I know Lattice does newer parts on 28 nm (and I'm sure there's 45 nm out there), but I haven't run into them.
Certainly for more density-heavy applications newer processes (28 nm, often) have come to the forefront, and we're at the point that we're seeing cost cuts going from 90 nm to 28 nm for equivalent functionality. But a lot of these designs are pin-out limited (the silicon area is dominated by getting signals on and off chip, not by the total area of transistors), so cost very much doesn't scale with transistor density; the cost per transistor has gone down, but the cost per unit area has gone up.
One thing that is driving new development is the lack of 8in capacity and the move to 12in (300mm) due to equipment availability. Most of the installed capacity of 80nm and larger was 8in and you can only really build new 12in fabs.
600Mhz and 128MB of DDR2 RAM is plenty for many applications. It's pretty much the lowest end processor you can get that will still run a Web server / GUI for easy network dongle. Even if it's on an ancient ARMv5 it still gets the job done today.
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Car and automotive is even lower end in practice. Every button is a uC whose only job is to convert button clicks into LINbus or CAN bus commands for the central computer.
No reason to go below 180nm for a lot of these chips... Well aside from cost. The older 90nm or 180nm nodes are IIRC getting more expensive as the old wafers are drying up (200mm vs modern 300mm).
A lot of cost optimized chips are 40nm to my knowledge, and others are 28nm now. TIs MSPM0 line comes to mind.