That ABI is hard to implement in LLVM, mostly because of SP can't be addressed as [4+SP] in DCPU-16. So, DCPU16 LLVM backend uses C register as a frame pointer (to store local variables and other data) and SP as a stack pointer to store ret addresses.
There're other "flaws" in that ABI which increase the cost of developing an LLVM backend.
I am going to make the supported ABI closer to #0x12-dev ABI in v0.0.5 and report them the most annoying features of their ABI.
Do you plan to make a short description of what exactly it took to create the backend?
I thought this would be an excellent excuse to learn about llvm, so been reading about its internals the past few days, and even though I realized that starting with MSP430 this would be relatively simple for someone who knows llvm, I am apparently too late to the party :) Nonetheless I would be interested in some overview.
SET J, [4+C] ; The Notch order
ADD J, 1 ; The Notch order
SET [4+C], J ; The Notch order
Is not transformed to ADD [4+C], 1
due to some assumptions in llvm, or do you not handle the literal values as arguments yet?Thanks for reporting, tracked by issue https://github.com/krasin/llvm-dcpu16/issues/67
And it's not really a "committee". Anyone can join the discussion. If the "committee" fails to understand your point, you are free to follow your own standards. If lots of people are unsatisfied, someone will fork it.
Just remember to communicate before you write lots of code/libraries/tools that only work with your own standard.
You are missing the point.
>> It would not surprise me if notch fails to consult this "standards committee" when he finally communicates how this CPU will interface with game components.
> I know we all like to say "why should these guys decide?"
Except that in this case these guys shouldn't really disillusion themselves in thinking they are deciding. It's not their call - it's an in-game CPU and the standards are going to be what the implementors find convenient. The odds of notch finding this standard favorable to my standards are about the same as him favoring my standards.
Huh? Notch doesn't have to give a shit about these standard. He's writing the emulator (and memory-mapped I/O); we still need conventions on top (calling external libraries; linking libraries and so on).
> the standards are going to be what the implementors find convenient.
Yes, of course. All I'm saying is that instead of each assembler/compiler/linker using its own "most convenient convention" we can at least try to unify them. And someone needs to write down drafts.