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Do you know how this is possible? Would decapping the SoC or taking an xray of it provide a physical map of the registers?

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You can find the register file relatively easily because it's a block of memory that's the same on each core but isn't cache, but it isn't a 1:1 map from architectural registers that we would recognize: the chip is designed to find an optimal allocation of slots in the register file to runtime values.

That’s where the GPRs would live. There’s no reason you have to put weird MMIO there too.

These particular registers aren't part of the CPU proper anyway, so not in the register file in that sense -- they're mmio mapped, and https://securelist.com/operation-triangulation-the-last-hard... concludes that they are "a block of CoreSight MMIO debug registers for the GPU coprocessor".

Indeed, my bad for only skimming.

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